Datasheet
LPC111X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 9.2 — 26 March 2014 16 of 127
NXP Semiconductors
LPC1110/11/12/13/14/15
32-bit ARM Cortex-M0 microcontroller
Fig 7. LPC1100XL series pin configuration HVQFN33
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Transparent top view
PIO0_8/MISO0/CT16B0_MAT0
PIO1_8/CT16B1_CAP0
PIO0_2/SSEL0/CT16B0_CAP0
PIO0_9/MOSI0/CT16B0_MAT1
V
DD
SWCLK/PIO0_10/SCK0/CT16B0_MAT2
XTALOUT PIO1_10/AD6/CT16B1_MAT1/MISO1
XTALIN R/PIO0_11/AD0/CT32B0_MAT3
PIO0_1/CLKOUT/CT32B0_MAT2 R/PIO1_0/AD1/CT32B1_CAP0
RESET/PIO0_0 R/PIO1_1/AD2/CT32B1_MAT0
PIO2_0/DTR/SSEL1 R/PIO1_2/AD3/CT32B1_MAT1
PIO0_3
PIO0_4/SCL
PIO0_5/SDA
PIO1_9/CT16B1_MAT0/MOSI1
PIO3_4/CT16B0_CAP1/RXD
PIO3_5/CT16B1_CAP1/TXD
PIO0_6/SCK0
PIO0_7/CTS
PIO1_7/TXD/CT32B0_MAT1
PIO1_6/RXD/CT32B0_MAT0
PIO1_5/RTS/CT32B0_CAP0
V
DD
PIO3_2/CT16B0_MAT2/SCK1
PIO1_11/AD7/CT32B1_CAP1
PIO1_4/AD5/CT32B1_MAT3/WAKEUP
SWDIO/PIO1_3/AD4/CT32B1_MAT2
8 17
7 18
6 19
5 20
4 21
3 22
2 23
1 24
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
terminal 1
index area
33 V
SS
Fig 8. LPC1100L series pin configuration SO20 package
LPC1110FD20
LPC1112FD20/
102
PIO0_8/MISO0/CT16B0_MAT0 PIO0_4/SCL
PIO0_9/MOSI0/CT16B0_MAT1 PIO0_2/SSEL0/CT16B0_CAP0
SWCLK/PIO0_10/SCK0/CT16B0_MAT2 PIO0_1/CLKOUT/CT32B0_MAT2
R/PIO0_11/AD0/CT32B0_MAT3 RESET/PIO0_0
PIO0_5/SDA V
SS
PIO0_6/SCK0 V
DD
R/PIO1_0/AD1/CT32B1_CAP0 XTALIN
R/PIO1_1/AD2/CT32B1_MAT0 XTALOUT
R/PIO1_2/AD3/CT32B1_MAT1 PIO1_7/TXD/CT32B0_MAT1
SWDIO/PIO1_3/AD4/CT32B1_MAT2 PIO1_6/RXD/CT32B0_MAT0
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1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19