Datasheet
LPC11U6x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 1.2 — 26 May 2014 27 of 96
NXP Semiconductors
LPC11U6x
32-bit ARM Cortex-M0+ microcontroller
8.14 USB interface
The Universal Serial Bus (USB) is a 4-wire bus that supports communication between a
host and one or more (up to 127) peripherals. The host controller allocates the USB
bandwidth to attached devices through a token-based protocol. The bus supports
hot-plugging and dynamic configuration of the devices. All transactions are initiated by the
host controller.
The USB interface consists of a full-speed device controller with on-chip PHY (PHYsical
layer) for device functions.
Remark: Configure the part in default power mode with the power profiles before using
the USB (see Section 8.25.7.1 “
Power profiles”). Do not use the USB when the part runs
in performance, efficiency, or low-power mode.
8.14.1 Full-speed USB device controller
The device controller enables 12 Mbit/s data exchange with a USB Host controller. It
consists of a register interface, serial interface engine, and endpoint buffer memory. The
serial interface engine decodes the USB data stream and writes data to the appropriate
endpoint buffer. The status of a completed USB transfer or error condition is indicated via
status registers. An interrupt is also generated if enabled.
8.14.1.1 Features
• Dedicated USB PLL available.
• Fully compliant with USB 2.0 specification (full speed).
• Supports 10 physical (5 logical) endpoints including one control endpoint.
• Single and double buffering supported.
• Each non-control endpoint supports bulk, interrupt, or isochronous endpoint types.
• Supports wake-up from Deep-sleep mode and Power-down mode on USB activity
and remote wake-up.
• Supports SoftConnect functionality through internal pull-up resistor.
• Internal 33 series termination resistors on USB_DP and USB_DM lines eliminate
the need for external series resistors.
• Supports Link Power Management (LPM).
• Supports XTAL-less low-speed mode using the 1% accurate IRC as the clock source
for the USB PLL. For board connection changes in low-speed mode, see Section
14.3.1 “USB Low-speed operation”.
8.15 USART0
Remark: The LPC11U6x contains two distinctive types of UART interfaces: USART0 is
software-compatible with the USART interface on the LPC11U1x/LPC11U2x/LPC11U3x
parts. USART1 to USART4 use a different register interface.
The USART0 includes full modem control, support for synchronous mode, and a smart
card interface. The RS-485/9-bit mode allows both software address detection and
automatic address detection using 9-bit mode.
The USART0 uses a fractional baud rate generator. Standard baud rates such as
115200 Bd can be achieved with any crystal frequency above 2 MHz.
