Datasheet
LPC11U6x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 1.2 — 26 May 2014 30 of 96
NXP Semiconductors
LPC11U6x
32-bit ARM Cortex-M0+ microcontroller
8.18.1 Features
• One I
2
C-interface (I2C0) is an I
2
C-bus compliant interface with open-drain pins. The
I
2
C-bus interface supports Fast-mode Plus with bit rates up to 1 Mbit/s.
• One I
2
C-interface (I2C1) uses standard digital pins. The I
2
C-bus interface supports bit
rates up to 400 kbit/s.
• Easy to configure as master, slave, or master/slave.
• Programmable clocks allow versatile rate control.
• Bidirectional data transfer between masters and slaves.
• Multi-master bus (no central master).
• Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
• Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
• Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
• The I
2
C-bus can be used for test and diagnostic purposes.
• The I
2
C-bus controller supports multiple address recognition and a bus monitor mode.
8.19 Timer/PWM subsystem
Four standard timers and two state configurable timers can be combined to create
multiple PWM outputs using the match outputs and the match registers for each timer.
Each timer can create multiple PWM outputs with its own time base.
Table 4. PWM resources
PWM
outputs
Peripheral Pin functions available for PWM Match
registers
used
LQFP100
LQFP64
LQFP48
LQFP100 LQFP64 LQFP48
3 3 3 CT16B0 CT16B0_MAT0,
CT16B0_MAT1,
CT16B0_MAT2
CT16B0_MAT0,
CT16B0_MAT1,
CT16B0_MAT2
CT16B0_MAT0,
CT16B0_MAT1,
CT16B0_MAT2
4
2 2 2 CT16B1 CT16B1_MAT0,
CT16B1_MAT1
CT16B1_MAT0,
CT16B1_MAT1
CT16B1_MAT0,
CT16B1_MAT1
3
3 3 3 CT32B0 three of
CT32B0_MAT0,
CT32B0_MAT1,
CT32B0_MAT2,
CT32B0_MAT3
three of
CT32B0_MAT0,
CT32B0_MAT1,
CT32B0_MAT2,
CT32B0_MAT3
three of
CT32B0_MAT0,
CT32B0_MAT1,
CT32B0_MAT2,
CT32B0_MAT3
4
