Datasheet

LPC1315_16_17_45_46_47 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 20 September 2012 23 of 77
NXP Semiconductors
LPC1315/16/17/45/46/47
32-bit ARM Cortex-M3 microcontroller
[1] Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled; IA = inactive, no pull-up/down enabled;
F = floating; floating pins, if not used, should be tied to ground or power to minimize power consumption.
[2] See Figure 33
for the reset pad configuration. RESET functionality is not available in Deep power-down mode. Use the WAKEUP pin to
reset the chip and wake up from Deep power-down mode. An external pull-up resistor is required on this pin for the Deep power-down
mode.
[3] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see Figure 32
).
[4] I
2
C-bus pins compliant with the I
2
C-bus specification for I
2
C standard mode, I
2
C Fast-mode, and I
2
C Fast-mode Plus.
[5] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see Figure 32
);
includes high-current output driver.
[6] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant (see Figure 32
); includes
programmable digital input glitch filter.
[7] WAKEUP pin. 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and
analog input. When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant (see Figure 32
);
includes digital input glitch filter.
[8] Pad provides USB functions. It is designed in accordance with the USB specification, revision 2.0 (Full-speed and Low-speed mode
only). This pad is not 5 V tolerant.
[9] When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.15
VREFP 64 - - - - ADC positive reference voltage: This should be nominally
the same voltage as V
DDA
but should be isolated to
minimize noise and error. Level on this pin is used as a
reference for ADC. This pin should be tied to 3.3 V if the
ADC is not used.
V
SSA
55 - - - - analog ground: 0 V reference. This should nominally be
the same voltage as V
SS
, but should be isolated to
minimize noise and error.
V
DD
10;
33;
58
8;
44
6;
29
- - Supply voltage to the internal regulator and the external
rail. On LQFP48 and HVQFN33 packages, this pin is also
connected to the 3.3 V ADC supply and reference
voltage.
V
SS
7;
54
5;
41
33 - - Ground.
Table 4. Pin description (LPC1345/46/47 - with USB)
Symbol
LQFP64 LQFP48 HVQFN33 Reset state
[1]
Type
Description