Datasheet

LPC1759_58_56_54_52_51 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 8.5 — 24 June 2014 12 of 80
NXP Semiconductors
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
P2[6]/PCAP1[0]/
RI1/TRACECLK
52
[1]
I/O P2[6] — General purpose digital input/output pin.
I PCAP1[0] — Capture input for PWM1, channel 0.
I RI1 — Ring Indicator input for UART1.
O TRACECLK — Trace Clock.
P2[7]/RD2/
RTS1
51
[1]
I/O P2[7] — General purpose digital input/output pin.
I RD2 — CAN2 receiver input. (LPC1759/58/56 only).
O RTS1 — Request to Send output for UART1. Can also be configured to be an
RS-485/EIA-485 output enable signal.
P2[8]/TD2/
TXD2
50
[1]
I/O P2[8] — General purpose digital input/output pin.
O TD2 — CAN2 transmitter output. (LPC1759/58/56 only).
O TXD2 — Transmitter output for UART2.
P2[9]/
USB_CONNECT/
RXD2
49
[1]
I/O P2[9] — General purpose digital input/output pin.
O USB_CONNECT — Signal used to switch an external 1.5 k resistor under
software control. Used with the SoftConnect USB feature.
I RXD2 — Receiver input for UART2.
P2[10]/EINT0
/NMI 41
[5]
I/O P2[10] — General purpose digital input/output pin. A LOW level on this pin during
reset starts the ISP command handler.
I EINT0
— External interrupt 0 input.
I NMI — Non-maskable interrupt input.
P4[0] to P4[31] I/O Port 4: Port 4 is a 32-bit I/O port with individual direction controls for each bit. The
operation of port 4 pins depends upon the pin function selected via the pin connect
block. Some port pins are not available on the LQFP80 package.
P4[28]/RX_MCLK/
MAT2[0]/TXD3
65
[1]
I/O P4[28] — General purpose digital input/output pin.
O RX_MCLK — I
2
S receive master clock. (LPC1759/58/56 only).
O MAT2[0] — Match output for Timer 2, channel 0.
O TXD3 — Transmitter output for UART3.
P4[29]/TX_MCLK/
MAT2[1]/RXD3
68
[1]
I/O P4[29] — General purpose digital input/output pin.
O TX_MCLK — I
2
S transmit master clock. (LPC1759/58/56 only).
O MAT2[1] — Match output for Timer 2, channel 1.
I RXD3 — Receiver input for UART3.
TDO/SWO 1
[6]
O TDO — Test Data out for JTAG interface.
O SWO — Serial wire trace output.
TDI 2
[7]
I TDI — Test Data in for JTAG interface.
TMS/SWDIO 3
[7]
I TMS — Test Mode Select for JTAG interface.
I/O SWDIO — Serial wire debug data input/output.
TRST
4
[7]
I TRST — Test Reset for JTAG interface.
TCK/SWDCLK 5
[6]
I TCK — Test Clock for JTAG interface.
I SWDCLK — Serial wire clock.
RSTOUT
11 O RSTOUT — This is a 3.3 V pin. LOW on this pin indicates
LPC1759/58/56/54/52/51 being in Reset state.
RESET
14
[8]
I External reset input: A LOW-going pulse as short as 50 ns on this pin resets the
device, causing I/O ports and peripherals to take on their default states, and
processor execution to begin at address 0. TTL with hysteresis, 5 V tolerant.
Table 4. Pin description …continued
Symbol Pin Type Description