Datasheet

LPC1759_58_56_54_52_51 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 8.5 — 24 June 2014 22 of 80
NXP Semiconductors
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
8.13.1 Features
• One or two CAN controllers and buses.
• Data rates to 1 Mbit/s on each bus.
• 32-bit register and RAM access.
• Compatible with CAN specification 2.0B, ISO 11898-1.
• Global Acceptance Filter recognizes standard (11-bit) and extended-frame (29-bit)
receive identifiers for all CAN buses.
• Acceptance Filter can provide FullCAN-style automatic reception for selected
Standard Identifiers.
• FullCAN messages can generate interrupts.
8.14 12-bit ADC
The LPC1759/58/56/54/52/51 contain one ADC. It is a single 12-bit successive
approximation ADC with six channels and DMA support.
8.14.1 Features
• 12-bit successive approximation ADC.
• Input multiplexing among 6 pins.
• Power-down mode.
• Measurement range VREFN to VREFP.
• 12-bit conversion rate: 200 kHz.
• Individual channels can be selected for conversion.
• Burst conversion mode for single or multiple inputs.
• Optional conversion on transition of input pin or Timer Match signal.
• Individual result registers for each ADC channel to reduce interrupt overhead.
• DMA support.
8.15 10-bit DAC (LPC1759/58/56/54 only)
The DAC allows to generate a variable analog output. The maximum output value of the
DAC is VREFP.
8.15.1 Features
• 10-bit DAC
• Resistor string architecture
• Buffered output
• Power-down mode
• Selectable output drive
• Dedicated conversion timer
• DMA support