Datasheet
LPC1759_58_56_54_52_51 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 8.5 — 24 June 2014 43 of 80
NXP Semiconductors
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
[15] TCK/SWDCLK pin needs to be externally pulled LOW.
[16] V
DDA
= 3.3 V; T
amb
=25C.
[17] The ADC is powered if the PDN bit in the AD0CR register is set to 1. See LPC17xx user manual UM10360.
[18] The ADC is in Power-down mode if the PDN bit in the AD0CR register is set to 0. See LPC17xx user manual UM10360.
[19] V
i(VREFP)
= 3.3 V; T
amb
=25C.
[20] Including voltage on outputs in 3-state mode.
[21] V
DD(3V3)
supply voltage 2.4 V.
[22] 3-state outputs go into 3-state mode in Deep power-down mode.
[23] Allowed as long as the current limit does not exceed the maximum current allowed by the device.
[24] Includes external resistors of 33 1 % on D+ and D.
11.1 Power consumption
Conditions: V
DD(Reg)(3V3)
= 3.3 V; BOD disabled.
Fig 6. Deep-sleep mode: Typical regulator supply current I
DD(Reg)(3V3)
versus
temperature
002aaf568
temperature (°C)
−40 853510 60−15
250
350
300
400
I
DD(Reg)(3V3)
(μA)
200
3.6 V
3.3 V
2.4 V