Datasheet

LPC1759_58_56_54_52_51 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 8.5 — 24 June 2014 59 of 80
NXP Semiconductors
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
Fig 23. SPI master timing (CPHA = 0)
Fig 24. SPI slave timing (CPHA = 1)
SCK (CPOL = 0)
MOSI
MISO
002aad987
T
SPICYC
t
SPICLKH
t
SPICLKL
t
SPIDSU
t
SPIDH
DATA VALID DATA VALID
t
SPIOH
SCK (CPOL = 1)
DATA VALID
DATA VALID
t
SPIQV
SCK (CPOL = 0)
MOSI
MISO
002aad988
T
SPICYC
t
SPICLKH
t
SPICLKL
t
SPIDSU
t
SPIDH
t
SPIQV
DATA VALID DATA VALID
t
SPIOH
SCK (CPOL = 1)
DATA VALID
DATA VALID