Datasheet

LPC1759_58_56_54_52_51 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 8.5 — 24 June 2014 6 of 80
NXP Semiconductors
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
6. Block diagram
Grey-shaded blocks represent peripherals with connection to the GPDMA.
Fig 1. Block diagram
SRAM
64/32/
16/8 kB
ARM
CORTEX-M3
TEST/DEBUG
INTERFACE
EMULATION
TRACE MODULE
FLASH
ACCELERATOR
FLASH
512/256/128/64/32 kB
DMA
CONTROLLER
ETHERNET
CONTROLLER
WITH DMA
(2)
USB HOST/
DEVICE/OTG
CONTROLLER
WITH DMA
(4)
I-code
bus
D-code
bus
system
bus
AHB TO
APB
BRIDGE 0
HIGH-SPEED
GPIO
AHB TO
APB
BRIDGE 1
CLOCK
GENERATION,
POWER CONTROL,
SYSTEM
FUNCTIONS
XTAL1
XTAL2
RESET
clocks and
controls
JTAG
interface
debug
port
USB PHY
SSP0
UART2/3
I2S
(1)
RI TIMER
SYSTEM CONTROL
SSP1
UART0/1
CAN1/CAN2
(1)
I2C1
SPI0
TIMER 0/1
WDT
PWM1
12-bit ADC
PIN CONNECT
GPIO INTERRUPT CONTROL
RTC
BACKUP REGISTERS
32 kHz
OSCILLATOR
APB slave group 1
APB slave group 0
RTC POWER DOMAIN
LPC1759/58/56/54/52/51
master master master
002aae153
slaveslave slave
slave
ROM
slave
slave
MULTILAYER AHB MATRIX
P0, P1,
P2, P4
SCK0
SSEL0
MISO0
MOSI0
SCK1
SSEL1
MISO1
MOSI1
RXD2/3
TXD2/3
SCL2
I2C2
SDA2
MOTOR CONTROL PWM
MCOA[2:0]
MCOB[2:0]
MCI[2:0]
TIMER2/3
4 × MAT2
2 × MAT3
I2SRX_SDA
I2STX_CLK
I2STX_WS
I2STX_SDA
TX_MCLK
RX_MCLK
DAC
(3)
AOUT
QUADRATURE ENCODER
PHA, PHB
INDEX
RTCX1
RTCX2
VBAT
PWM1[6:1]
2 × MAT0/1
1 × CAP0,
2 × CAP1
RD1/2
TD1/2
SDA1
SCL1
AD0[7:2]
SCK/SSEL
MOSI/MISO
8 × UART1
RXD0/TXD0
P0, P2
PCAP1[1:0]
RMII pins
USB pins
MPU
(1)
LPC1759/58/56 only
(2)
LPC1758 only
EXTERNAL INTERRUPTS
EINT0
(3)
LPC1759/58/56/54 only
(4)
LPC1752/51 USB device only