Datasheet
LPC1759_58_56_54_52_51 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 8.5 — 24 June 2014 75 of 80
NXP Semiconductors
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
20. Revision history
Table 26. Revision history
Document ID Release date Data sheet status Change
notice
Supersedes
LPC1759_58_56_54_52_51 v.8.5 20140624 Product data sheet - LPC1759_58_56_54_52_51 v.8.4
Modifications:
• SSP timing diagram updated. SSP timing parameters t
v(Q)
, t
h(Q)
, t
DS
, and t
DH
added. See Section 12.7 “
SSP interface”.
• SSP maximum bit rate in master mode corrected to 33 Mbit/s.
• Parameter T
j(max)
added in Table 5 “Limiting values”.
• Description of capture channels corrected in Section 8.21.1.
LPC1759_58_56_54_52_51 v.8.4 20140404 Product data sheet - LPC1759_58_56_54_52_51 v.8.3
Modifications:
• Table 4 “Pin description”: Changed RX_MCLK and TX_MCLK type from INPUT to
OUTPUT.
LPC1759_58_56_54_52_51 v.8.3 20140108 Product data sheet - LPC1759_58_56_54_52_51 v.8.2
Modifications:
• Table 6 “Thermal resistance (±15 %)”: Added 15 % to table title.
LPC1759_58_56_54_52_51 v.8.2 20131018 Product data sheet - LPC1759_58_56_54_52_51 v.8.1
Modifications:
• Table 5 “Limiting values”: Removed condition “5 V tolerant open-drain pins...” from
V
I
.
• Table 7 “Static characteristics”:
– Added Table note 3 “VDDA and VREFP should be tied to VDD(3V3) if the ADC
and DAC are not used.”
– Added Table note 4 “VDDA for DAC specs are from 2.7 V to 3.6 V.”
– V
DDA
/VREFP spec changed from 2.7 V to 2.5 V.
• Table 18 “ADC characteristics (full resolution)”:
– Added Table note 1 “VDDA and VREFP should be tied to VDD(3V3) if the ADC
and DAC are not used.”
– V
DDA
changed from 2.7 V to 2.5 V.
• Table 19 “ADC characteristics (lower resolution)”: Added Table note 1 “VDDA and
VREFP should be tied to VDD(3V3) if the ADC and DAC are not used.”
LPC1759_58_56_54_52_51 v.8.1 20130912 Product data sheet - LPC1759_58_56_54_52_51 v.8
Modifications:
• Added Table 6 “Thermal resistance”.
• Table 5 “Limiting values”:
– Updated min/max values for V
DD(3V3)
and V
DD(REG)(3V3)
.
– Updated conditions for V
I
.
– Updated table notes.
• Table 7 “Static characteristics”: Added Table note 14 “TCK/SWDCLK pin needs to
be externally pulled LOW.”
• Updated Section 15.1 “Suggested USB interface solutions”.
• Added Section 5 “Marking”.
• Changed title of Figure 29 from “USB interface on a self-powered device” to “USB
interface with soft-connect”.
LPC1759_58_56_54_52_51 v.8 20120809 Product data sheet - LPC1759_58_56_54_52_51 v.7