Datasheet

LPC178X_7X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 5 — 9 September 2014 93 of 122
NXP Semiconductors
LPC178x/7x
32-bit ARM Cortex-M3 microcontroller
11.10 SD/MMC
Remark: The SD/MMC card interface is available on parts LPC1788/87/86 and parts
LPC1778/77/76.
The LCD panel clock is shown with the default polarity. The clock can be inverted via the IPC bit in
the LCD_POL register. Typically, the LCD panel uses the falling edge of the LCD_DCLK to sample
the data.
Fig 26. LCD timing
002aah325
LCD_DCLK
t
d(QV)
T
cy(clk)
t
h(Q)
LCD_VD[n]
Table 28. Dynamic characteristics: SD/MMC
C
L
=10pF, T
amb
=  40  C to 85  C, V
DD(3V3)
= 3.0 V to 3.6 V. Values guaranteed by design.
Symbol Parameter Conditions Min Max Unit
f
clk
clock frequency on pin SD_CLK; data transfer mode - 25 MHz
on pin SD_CLK; identification mode 25 MHz
t
su(D)
data input set-up time on pins SD_CMD, SD_DAT[3:0] as
inputs
6- ns
t
h(D)
data input hold time on pins SD_CMD, SD_DAT[3:0] as
inputs
6- ns
t
d(QV)
data output valid
delay time
on pins SD_CMD, SD_DAT[3:0] as
outputs
-23ns
t
h(Q)
data output hold time on pins SD_CMD, SD_DAT[3:0] as
outputs
3.5 - ns
Fig 27. SD/MMC timing
002aag204
SD_CLK
SD_DATn (O)
SD_DATn (I)
t
d(QV)
t
h(D)
t
su(D)
T
cy(clk)
t
h(Q)
SD_CMD (O)
SD_CMD (I)