Datasheet

LPC1850_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 6.4 — 18 August 2014 19 of 150
NXP Semiconductors
LPC1850/30/20/10
32-bit ARM Cortex-M3 microcontroller
P3_1 G11 D10 F7 114
[2]
N; PU I/O I2S0_TX_WS — Transmit Word Select. It is driven by the
master and received by the slave. Corresponds to the signal
WS in the I
2
S-bus specification.
I/O I2S0_RX_WS — Receive Word Select. It is driven by the
master and received by the slave. Corresponds to the signal
WS in the I
2
S-bus specification.
I CAN0_RD — CAN receiver input.
O USB1_IND1 — USB1 Port indicator LED control output 1.
I/O GPIO5[8] — General purpose digital input/output pin.
- R — Function reserved.
O LCD_VD15 — LCD data.
- R — Function reserved.
P3_2 F11 D9 G6 116
[2]
OL;
PU
I/O I2S0_TX_SDA — I
2
S transmit data. It is driven by the
transmitter and read by the receiver. Corresponds to the signal
SD in the I
2
S-bus specification.
I/O I2S0_RX_SDA — I
2
S receive data. It is driven by the
transmitter and read by the receiver. Corresponds to the signal
SD in the I
2
S-bus specification.
O CAN0_TD — CAN transmitter output.
O USB1_IND0 — USB1 Port indicator LED control output 0.
I/O GPIO5[9] — General purpose digital input/output pin.
- R — Function reserved.
O LCD_VD14 — LCD data.
- R — Function reserved.
P3_3 B14 B13 A7 118
[4]
N; PU - R — Function reserved.
- R — Function reserved.
I/O SSP0_SCK — Serial clock for SSP0.
O SPIFI_SCK — Serial clock for SPIFI.
O CGU_OUT1 — CGU spare clock output 1.
- R — Function reserved.
O I2S0_TX_MCLK — I
2
S transmit master clock.
I/O I2S1_TX_SCK — Transmit Clock. It is driven by the master
and received by the slave. Corresponds to the signal SCK in
the I
2
S-bus specification.
Table 3. Pin description
…continued
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See Table 2.
Symbol
LBGA256 TFBGA180 TFBGA100 LQFP144 Reset state [1] Type
Description