Datasheet

LPC1850_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 6.4 — 18 August 2014 27 of 150
NXP Semiconductors
LPC1850/30/20/10
32-bit ARM Cortex-M3 microcontroller
P6_3 P15 N13 - 79
[2]
N; PU I/O GPIO3[2] — General purpose digital input/output pin.
O USB0_PPWR — VBUS drive signal (towards external charge
pump or power management unit); indicates that the VBUS
signal must be driven (active HIGH).
Add a pull-down resistor to disable the power switch at reset.
This signal has opposite polarity compared to the USB_PPWR
used on other NXP LPC parts.
- R — Function reserved.
O EMC_CS1
— LOW active Chip Select 1 signal.
- R — Function reserved.
I T2_CAP2 — Capture input 2 of timer 2.
- R — Function reserved.
- R — Function reserved.
P6_4 R16 M14 F6 80
[2]
N; PU I/O GPIO3[3] — General purpose digital input/output pin.
I CTIN_6 — SCTimer/PWM input 6. Capture input 1 of timer 3.
O U0_TXD — Transmitter output for USART0.
O EMC_CAS
— LOW active SDRAM Column Address Strobe.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
P6_5 P16 L14 F9 82
[2]
N; PU I/O GPIO3[4] — General purpose digital input/output pin.
O CTOUT_6 — SCTimer/PWM output 6. Match output 2 of timer
1.
I U0_RXD — Receiver input for USART0.
O EMC_RAS
— LOW active SDRAM Row Address Strobe.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
Table 3. Pin description
…continued
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See Table 2.
Symbol
LBGA256 TFBGA180 TFBGA100 LQFP144 Reset state [1] Type
Description