Datasheet

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Product data sheet Rev. 4.1 — 6 May 2014 103 of 148
NXP Semiconductors
LPC185x/3x/2x/1x
32-bit ARM Cortex-M3 microcontroller
10.4 BOD and band gap static characteristics
[1] Interrupt and reset levels are selected by writing to the BODLV1/2 bits in the control register CREGE0, see
the LPC18xx user manual.
Table 13. BOD static characteristics
[1]
T
amb
=25  C; simulated values for nominal processing.
Symbol Parameter Conditions Min Typ Max Unit
V
th
threshold voltage interrupt level 0
assertion - 2.25 - V
de-assertion - 2.33 - V
interrupt level 1
assertion - 2.35 - V
de-assertion - 2.43 - V
interrupt level 2
assertion - 2.95 - V
de-assertion - 3.03 - V
interrupt level 3
assertion - 3.05 - V
de-assertion - 3.13 - V
reset level 0
assertion - 1.9 - V
de-assertion - 1.98 - V
reset level 1
assertion - 2.0 - V
de-assertion - 2.08 - V
reset level 2
assertion - 2.1 - V
de-assertion - 2.18 - V
reset level 3
assertion - 2.2 - V
de-assertion - 2.28 - V