Datasheet

Product data sheet Rev. 4.1 — 6 May 2014 131 of 148

NXP Semiconductors

LPC185x/3x/2x/1x

32-bit ARM Cortex-M3 microcontroller

On the LPC185x/3x/2x/1x, USBn_VBUS pins are 5 V tolerant only when VDDIO is applied

and at operating voltage level. Therefore, if the USBn_VBUS function is connected to the

USB connector and the device is self-powered, the USBn_VBUS pins must be protected

for situations when VDDIO = 0 V.

If VDDIO is always at operating level while VBUS = 5 V, the USBn_VBUS pin can be

connected directly to the VBUS pin on the USB connector.

For systems where VDDIO can be 0 V and VBUS is directly applied to the USBn_VBUS

pins, precautions must be taken to reduce the voltage to below 3.6 V, which is the

maximum allowable voltage on the USBn_VBUS pins in this case.

One method is to use a voltage divider to connect the USBn_VBUS pins to VBUS on the

USB connector. The voltage divider ratio should be such that the USB_VBUS pin will be

greater than 0.7VDDIO to indicate a logic HIGH while below the 3.6 V allowable maximum

voltage.

For the following operating conditions

VBUS

max

= 5.25 V

VDDIO = 3.6 V,

the voltage divider should provide a reduction of 3.6 V/5.25 V or ~0.686 V.

For bus-powered devices, a regulator powered by USB can provide 3.3 V to VDDIO

whenever bus power is present and ensure that power to the USBn_VBUS pins is always

present when the 5 V VBUS signal is applied. See Figure 46

Remark: Applying 5 V to the USBn_VBUS pins for a short time while the regulator ramps

up does not compromise the functionality of the part.

Fig 45. USB interface on a self-powered device where USBn_VBUS = 5 V

LPC18xx

VDDIO

USB-B

connector

USBn_VBUS

VBUS

USB

aaa-013015