Datasheet

LPC185X_3X_2X_1X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4.1 — 6 May 2014 16 of 148
NXP Semiconductors
LPC185x/3x/2x/1x
32-bit ARM Cortex-M3 microcontroller
P2_5 K14 D10 91 131
[3]
N;
PU
- R — Function reserved.
I CTIN_2 — SCTimer/PWM input 2. Capture input 2 of timer 0.
I USB1_VBUS — Monitors the presence of USB1 bus power.
Note: This signal must be HIGH for USB reset to occur.
I ADCTRIG1 — ADC trigger input 1.
I/O GPIO5[5] — General purpose digital input/output pin.
- R — Function reserved.
O T3_MAT2 — Match output 2 of timer 3.
O USB0_IND0 — USB0 port indicator LED control
output 0.
P2_6 K16 G9 95 137
[2]
N;
PU
- R — Function reserved.
I/O U0_DIR — RS-485/EIA-485 output enable/direction control for
USART0.
I/O EMC_A10 — External memory address line 10.
O USB0_IND0 — USB0 port indicator LED control
output 0.
I/O GPIO5[6] — General purpose digital input/output pin.
I CTIN_7 — SCTimer/PWM input 7.
I T3_CAP3 — Capture input 3 of timer 3.
O EMC_BLS1
— LOW active Byte Lane select signal 1.
P2_7 H14 C10 96 138
[2]
N;
PU
I/O GPIO0[7] — General purpose digital input/output pin. ISP
entry pin. If this pin is pulled LOW at reset, the part enters ISP
mode or boots from an external source (see Table 4
and
Table 5
).
O CTOUT_1 — SCTimer/PWM output 1. Match output 3 of timer
3.
I/O U3_UCLK — Serial clock input/output for USART3 in
synchronous mode.
I/O EMC_A9 — External memory address line 9.
- R — Function reserved.
- R — Function reserved.
O T3_MAT3 — Match output 3 of timer 3.
- R — Function reserved.
Table 3. Pin description
…continued
Pin name
LBGA256 TFBGA100 LQFP144 LQFP208 Reset state [1] Type
Description