Datasheet

LPC185X_3X_2X_1X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4.1 — 6 May 2014 20 of 148
NXP Semiconductors
LPC185x/3x/2x/1x
32-bit ARM Cortex-M3 microcontroller
P3_4 A15 B8 119 171
[2]
N;
PU
I/O GPIO1[14] — General purpose digital input/output pin.
- R — Function reserved.
- R — Function reserved.
I/O SPIFI_SIO3 — I/O lane 3 for SPIFI.
O U1_TXD — Transmitter output for UART1.
I/O I2S0_TX_WS — Transmit Word Select. It is driven by the
master and received by the slave. Corresponds to the signal
WS in the I
2
S-bus specification.
I/O I2S1_RX_SDA — I
2
S1 Receive data. It is driven by the
transmitter and read by the receiver. Corresponds to the signal
SD in the I
2
S-bus specification.
O LCD_VD13 — LCD data.
P3_5 C12 B7 121 173
[2]
N;
PU
I/O GPIO1[15] — General purpose digital input/output pin.
- R — Function reserved.
- R — Function reserved.
I/O SPIFI_SIO2 — I/O lane 2 for SPIFI.
I U1_RXD — Receiver input for UART1.
I/O I2S0_TX_SDA — I
2
S transmit data. It is driven by the
transmitter and read by the receiver. Corresponds to the signal
SD in the I
2
S-bus specification.
I/O I2S1_RX_WS — Receive Word Select. It is driven by the
master and received by the slave. Corresponds to the signal
WS in the I
2
S-bus specification.
O LCD_VD12 — LCD data.
P3_6 B13 C7 122 174
[2]
N;
PU
I/O GPIO0[6] — General purpose digital input/output pin.
- R — Function reserved.
I/O SSP0_SSEL — Slave Select for SSP0.
I/O SPIFI_MISO — Input 1 in SPIFI quad mode; SPIFI output IO1.
- R — Function reserved.
I/O SSP0_MISO — Master In Slave Out for SSP0.
- R — Function reserved.
- R — Function reserved.
P3_7 C11 D7 123 176
[2]
N;
PU
- R — Function reserved.
- R — Function reserved.
I/O SSP0_MISO — Master In Slave Out for SSP0.
I/O SPIFI_MOSI — Input 0 in SPIFI quad mode; SPIFI output IO0.
I/O GPIO5[10] — General purpose digital input/output pin.
I/O SSP0_MOSI — Master Out Slave in for SSP0.
- R — Function reserved.
- R — Function reserved.
Table 3. Pin description
…continued
Pin name
LBGA256 TFBGA100 LQFP144 LQFP208 Reset state [1] Type
Description