Datasheet

LPC185X_3X_2X_1X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4.1 — 6 May 2014 36 of 148
NXP Semiconductors
LPC185x/3x/2x/1x
32-bit ARM Cortex-M3 microcontroller
PA_0 L12 - - 126
[2]
N;
PU
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
O I2S1_RX_MCLK — I
2
S1 receive master clock.
O CGU_OUT1 — CGU spare clock output 1.
- R — Function reserved.
PA_1 J14 - - 134
[3]
N;
PU
I/O GPIO4[8] — General purpose digital input/output pin.
I QEI_IDX — Quadrature Encoder Interface INDEX input.
- R — Function reserved.
O U2_TXD — Transmitter output for USART2.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
PA_2 K15 - - 136
[3]
N;
PU
I/O GPIO4[9] — General purpose digital input/output pin.
I QEI_PHB — Quadrature Encoder Interface PHB input.
- R — Function reserved.
I U2_RXD — Receiver input for USART2.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
PA_3 H11 - - 147
[3]
N;
PU
I/O GPIO4[10] — General purpose digital input/output pin.
I QEI_PHA — Quadrature Encoder Interface PHA input.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
Table 3. Pin description
…continued
Pin name
LBGA256 TFBGA100 LQFP144 LQFP208 Reset state [1] Type
Description