Datasheet

LPC185X_3X_2X_1X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4.1 — 6 May 2014 55 of 148
NXP Semiconductors
LPC185x/3x/2x/1x
32-bit ARM Cortex-M3 microcontroller
CLK0 N5 K3 45 62
[4]
O;
PU
O EMC_CLK0 — SDRAM clock 0.
O CLKOUT — Clock output pin.
- R — Function reserved.
- R — Function reserved.
I/O SD_CLK — SD/MMC card clock.
O EMC_CLK01 — SDRAM clock 0 and clock 1 combined.
I/O SSP1_SCK — Serial clock for SSP1.
I ENET_TX_CLK (ENET_REF_CLK) — Ethernet Transmit
Clock (MII interface) or Ethernet Reference Clock (RMII
interface).
CLK1 T10 - - -
[4]
O;
PU
O EMC_CLK1 — SDRAM clock 1.
O CLKOUT — Clock output pin.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
O CGU_OUT0 — CGU spare clock output 0.
- R — Function reserved.
O I2S1_TX_MCLK — I
2
S1 transmit master clock.
CLK2 D14 K6 99 141
[4]
O;
PU
O EMC_CLK3 — SDRAM clock 3.
O CLKOUT — Clock output pin.
- R — Function reserved.
- R — Function reserved.
I/O SD_CLK — SD/MMC card clock.
O EMC_CLK23 — SDRAM clock 2 and clock 3 combined.
O I2S0_TX_MCLK — I
2
S transmit master clock.
I/O I2S1_RX_SCK — Receive Clock. It is driven by the master
and received by the slave. Corresponds to the signal SCK in
the I
2
S-bus specification.
CLK3 P12 - - -
[4]
O;
PU
O EMC_CLK2 — SDRAM clock 2.
O CLKOUT — Clock output pin.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
O CGU_OUT1 — CGU spare clock output 1.
- R — Function reserved.
I/O I2S1_RX_SCK — Receive Clock. It is driven by the master
and received by the slave. Corresponds to the signal SCK in
the I
2
S-bus specification.
Table 3. Pin description
…continued
Pin name
LBGA256 TFBGA100 LQFP144 LQFP208 Reset state [1] Type
Description