Datasheet
LPC185X_3X_2X_1X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4.1 — 6 May 2014 58 of 148
NXP Semiconductors
LPC185x/3x/2x/1x
32-bit ARM Cortex-M3 microcontroller
[1] N = neutral, input buffer disabled; no extra VDDIO current consumption if the input is driven midway between supplies; set the EZI bit in
the SFS register to enable the input buffer; I = input, OL = output driving LOW; OH = output driving HIGH; AI/O = analog input/output; IA
= inactive; PU = pull-up enabled (weak pull-up resistor pulls up pin to VDDIO; F = floating. Reset state reflects the pin state at reset
without boot code operation.
[2] 5 V tolerant pad with 15 ns glitch filter (5 V tolerant if VDDIO present; if VDDIO not present, do not exceed 3.6 V); provides digital I/O
functions with TTL levels and hysteresis; normal drive strength.
VBAT B10 C5 127 184 - - RTC power supply: 3.3 V on this pin supplies power to the
RTC.
VDDREG F10,
F9,
L8,
L7
E4,
E5,
F4
94,
131,
59,
25
135,
188,
195,
82,
33
- Main regulator power supply.
VPP E8 - - -
[12]
- - OTP programming voltage.
VDDIO D7,
E12,
F7,
F8,
G10,
H10,
J6,
J7,
K7,
L9,
L10,
N7,
N13
F10,
K5
5,
36,
41,
71,
77,
107,
111,
141
6,
52,
57,
102,
110,
155,
160,
202
[12]
- - I/O power supply.
VSS G9,
H7,
J10,
J11,
K8
C8,
D4,
D5,
G8,
J3,
J6
--
[13]
- - Ground.
VSSIO C4,
D13,
G6,
G7,
G8,
H8,
H9,
J8,
J9,
K9,
K10,
M13,
P7,
P13
-4,
40,
76,
109
5,
56,
109,
157
[13]
- - Ground.
VSSA B2 C2 135 196 - - Analog ground.
Table 3. Pin description
…continued
Pin name
LBGA256
TFBGA100
LQFP144
LQFP208
Reset state
[1]
Type
Description