Datasheet

LPC185X_3X_2X_1X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4.1 — 6 May 2014 93 of 148
NXP Semiconductors
LPC185x/3x/2x/1x
32-bit ARM Cortex-M3 microcontroller
[1] Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages.
[2] The recommended operating condition for the battery supply is V
DD(REG)(3V3)
> V
BAT
+ 0.2 V. Dynamic characteristics for peripherals are
provided for V
DD(REG)(3V)
2.7 V.
[3] Pin VPP should either be not connected (when OTP does not need to be programmed) or tied to pins VDDIO and VDDREG to ensure
the same ramp-up time for both supply voltages.
[4] V
DD(REG)(3V3)
= 3.3 V; V
DD(IO)
= 3.3 V; T
amb
=25C.
[5] PLL1 disabled; IRC running; CCLK = 12 MHz.
[6] V
BAT
= 3.6 V.
[7] T
amb
=-40C to +105 C; V
DD(IO)
= V
DDA
= 3.6 V; over entire frequency range CCLK = 12 MHz to 180 MHz; in active mode, sleep
mode; deep-sleep mode, power-down mode, and deep power-down mode.
[8] V
ps
corresponds to the output of the power switch (see Figure 9) which is determined by the greater of V
BAT
and V
DD(Reg)(3V3)
.
[9] V
DDA(3V3)
= 3.3 V; T
amb
=25C.
[10] Allowed as long as the current limit does not exceed the maximum current allowed by the device.
[11] To V
SS
.
[12] The values specified are simulated and absolute values.
[13] The weak pull-up resistor is connected to the V
DD(IO)
rail and pulls up the I/O pin to the V
DD(IO)
level.
[14] The input cell disables the weak pull-up resistor when the applied input voltage exceeds V
DD(IO)
.
[15] The parameter value specified is a simulated value excluding bond capacitance.
[16] For USB operation 3.0 V V
DD((IO)
3.6 V. Guaranteed by design.
[17] V
DD(IO)
present.
[18] Includes external resistors of 33 1 % on D+ and D.
V
BUS
bus supply voltage
[17]
--5.25V
V
DI
differential input
sensitivity voltage
(D+) (D) 0.2--V
V
CM
differential common
mode voltage range
includes V
DI
range 0.8 - 2.5 V
V
th(rs)se
single-ended receiver
switching threshold
voltage
0.8 - 2.0 V
V
OL
LOW-level output
voltage for
low-/full-speed
R
L
of 1.5 k to 3.6 V - - 0.18 V
V
OH
HIGH-level output
voltage (driven) for
low-/full-speed
R
L
of 15 k to GND 2.8 - 3.5 V
C
trans
transceiver capacitance pin to GND - - 20 pF
Z
DRV
driver output
impedance for driver
which is not high-speed
capable
with 33 series resistor;
steady state drive
[18]
36 - 44.1
Table 11. Static characteristics …continued
T
amb
=
40
C to +105
C, unless otherwise specified.
Symbol Parameter Conditions Min Typ
[1]
Max Unit