Datasheet

LPC2194 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 14 June 2011 10 of 41
NXP Semiconductors
LPC2194
Single-chip 16/32-bit microcontroller
ISP flash erase command can be executed at any time (no matter whether the CRP is on
or off). Removal of CRP is achieved by erasure of full on-chip user flash. With the CRP off,
full access to the chip via the JTAG and/or ISP is restored.
6.3 On-chip SRAM
On-chip SRAM may be used for code and/or data storage. The SRAM may be accessed
as 8 bit, 16 bit, and 32 bit. The LPC2194 provides 16 kB of SRAM.
6.4 Memory map
The LPC2194 memory maps incorporate several distinct regions, as shown in Figure 3.
In addition, the CPU interrupt vectors may be re-mapped to allow them to reside in either
flash memory (the default) or on-chip SRAM. This is described in Section 6.18 “
System
control”.