Datasheet

LPC2292_2294 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 June 2011 10 of 54
NXP Semiconductors
LPC2292/2294
16/32-bit ARM microcontrollers with external memory interface
P0[27]/AIN0/
CAP0[1]/
MAT0[1]
23
[6]
H3
[6]
I AIN0 — ADC, input 0. This analog input is always connected
to its pin.
I CAP0[1] — Capture input for Timer 0, channel 1.
O MAT0[1] — Match output for Timer 0, channel 1.
P0[28]/AIN1/
CAP0[2]/
MAT0[2]
25
[6]
J1
[6]
I AIN1 — ADC, input 1. This analog input is always connected
to its pin.
I CAP0[2] — Capture input for Timer 0, channel 2.
O MAT0[2] — Match output for Timer 0, channel 2.
P0[29]/AIN2/
CAP0[3]/
MAT0[3]
32
[6]
L1
[6]
I AIN2 — ADC, input 2. This analog input is always connected
to its pin.
I CAP0[3] — Capture input for Timer 0, Channel 3.
O MAT0[3] — Match output for Timer 0, channel 3.
P0[30]/AIN3/
EINT3/CAP0[0]
33
[6]
L2
[6]
I AIN3 — ADC, input 3. This analog input is always connected
to its pin.
I EINT3 — External interrupt 3 input.
I CAP0[0] — Capture input for Timer 0, channel 0.
P1[0] to P1[31] I/O Port 1: Port 1 is a 32-bit bidirectional I/O port with individual
direction controls for each bit. The operation of port 1 pins
depends upon the pin function selected via the Pin Connect
Block.
Pins 2 through 15 of port 1 are not available.
P1[0]/CS0
91
[7]
G11
[7]
O CS0 — LOW-active Chip Select 0 signal.
(Bank 0 addresses range 0x8000 0000 to 0x80FF FFFF)
P1[1]/OE 90
[7]
G13
[7]
O OE — LOW-active Output Enable signal.
P1[16]/
TRACEPKT0
34
[7]
L3
[7]
O TRACEPKT0 — Trace Packet, bit 0. Standard I/O port with
internal pull-up.
P1[17]/
TRACEPKT1
24
[7]
H4
[7]
O TRACEPKT1 — Trace Packet, bit 1. Standard I/O port with
internal pull-up.
P1[18]/
TRACEPKT2
15
[7]
F2
[7]
O TRACEPKT2 — Trace Packet, bit 2. Standard I/O port with
internal pull-up.
P1[19]/
TRACEPKT3
7
[7]
D2
[7]
O TRACEPKT3 — Trace Packet, bit 3. Standard I/O port with
internal pull-up.
P1[20]/
TRACESYNC
102
[7]
D12
[7]
O TRACESYNC — Trace Synchronization. Standard I/O port
with internal pull-up.
Note: LOW on this pin while RESET
is LOW, enables pins
P1[25:16] to operate as Trace port after reset.
P1[21]/
PIPESTAT0
95
[7]
F11
[7]
O PIPESTAT0 — Pipeline Status, bit 0. Standard I/O port with
internal pull-up.
P1[22]/
PIPESTAT1
86
[7]
H11
[7]
O PIPESTAT1 — Pipeline Status, bit 1. Standard I/O port with
internal pull-up.
P1[23]/
PIPESTAT2
82
[7]
J11
[7]
O PIPESTAT2 — Pipeline Status, bit 2. Standard I/O port with
internal pull-up.
P1[24]/
TRACECLK
70
[7]
L11
[7]
O TRACECLK — Trace Clock. Standard I/O port with internal
pull-up.
Table 4. Pin description
…continued
Symbol Pin (LQFP) Pin
(TFBGA)
[1]
Type Description