Datasheet

LPC2292_2294 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 June 2011 4 of 54
NXP Semiconductors
LPC2292/2294
16/32-bit ARM microcontrollers with external memory interface
4. Block diagram
(1) When test/debug interface is used, GPIO/other functions sharing these pins are not available.
(2) Pins shared with GPIO.
(3) Available in LPC2294 only.
(4) SSP interface and high-speed GPIO are available on LPC2292/2294/01 only.
Fig 1. Block diagram
002aad184
system
clock
SCL
P0[30:0]
P2[31:0]
P1[31:16], P1[1:0]
P3[31:0]
SDA
CS3 to CS0
(2)
A23 to A0
(2)
BLS3 to BLS0
(2)
OE, WE
(2)
D31 to D0
(2)
TRST
(1)
TMS
(1)
TCK
(1)
TDI
(1)
TDO
(1)
XTAL2
XTAL1
SCK1
MOSI1
MISO1
EINT3 to EINT0
4 × CAP0
4 × CAP1
4 × MAT1
4 × MAT0
AIN3 to AIN0
AIN7 to AIN4
PWM6 to PWM1
SSEL1
TD2, TD1
RD2, RD1
TD4, TD3
(3)
RD4, RD3
(3)
TXD0, TXD1
RXD0, RXD1
DSR1, CTS1,
DCD1, RI1
AMBA AHB
(Advanced High-performance Bus)
AHB BRIDGE
EMULATION
TRACE MODULE
TEST/DEBUG
INTERFACE
AHB
DECODER
AHB TO APB
BRIDGE
APB
DIVIDER
VECTORED
INTERRUPT
CONTROLLER
SYSTEM
FUNCTIONS
PLL
SPI1/SSP
(4)
SERIAL INTERFACE
I
2
C-BUS SERIAL
INTERFACE
UART0/UART1
CAN
WATCHDOG
TIMER
EXTERNAL
INTERRUPTS
GENERAL
PURPOSE I/O
PWM0
CAPTURE/
COMPARE
TIMER 0/TIMER 1
A/D CONVERTER
ARM7TDMI-S
LPC2292
LPC2294
INTERNAL
SRAM
CONTROLLER
16 kB
SRAM
ARM7 local bus
APB (advanced
peripheral bus)
SCK0
MOSI0
MISO0
SSEL0
SPI0
SERIAL INTERFACE
REAL-TIME CLOCK
SYSTEM CONTROL
INTERNAL
FLASH
CONTROLLER
256 kB
FLASH
RESET
EXTERNAL MEMORY
CONTROLLER
P0, P1
HIGH-SPEED
GPIO
(4)
48 PINS TOTAL