Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 100 (14x14) 16/32-Bit 72 MHz I/O number 70

Table Of Contents

1. General description
2. Features and benefits
3. Applications
4. Ordering information
- 4.1 Ordering options
5. Block diagram
6. Pinning information
- 6.1 Pinning
- 6.2 Pin description
7. Functional description
- 7.1 Architectural overview
- 7.2 On-chip flash programming memory
- 7.3 On-chip SRAM
- 7.4 Memory map
- 7.5 Interrupt controller
  - 7.5.1 Interrupt sources
- 7.6 Pin connect block
- 7.7 General purpose DMA controller
  - 7.7.1 Features
- 7.8 Fast general purpose parallel I/O
  - 7.8.1 Features
- 7.9 Ethernet (LPC2362 only)
  - 7.9.1 Features
- 7.10 USB interface
  - 7.10.1 USB device controller
    - 7.10.1.1 Features
  - 7.10.2 USB host controller
    - 7.10.2.1 Features
  - 7.10.3 USB OTG controller
    - 7.10.3.1 Features
- 7.11 CAN controller and acceptance filters
  - 7.11.1 Features
- 7.12 10-bit ADC
  - 7.12.1 Features
- 7.13 10-bit DAC
  - 7.13.1 Features
- 7.14 UARTs
  - 7.14.1 Features
- 7.15 SPI serial I/O controller
  - 7.15.1 Features
- 7.16 SSP serial I/O controller
  - 7.16.1 Features
- 7.17 I2C-bus serial I/O controllers
  - 7.17.1 Features
- 7.18 I2S-bus serial I/O controllers
  - 7.18.1 Features
- 7.19 General purpose 32-bit timers/external event counters
  - 7.19.1 Features
- 7.20 Pulse width modulator
  - 7.20.1 Features
- 7.21 Watchdog timer
  - 7.21.1 Features
- 7.22 RTC and battery RAM
  - 7.22.1 Features
- 7.23 Clocking and power control
  - 7.23.1 Crystal oscillators
  - 7.23.2 PLL
  - 7.23.3 Wake-up timer
  - 7.23.4 Power control
- 7.24 System control
  - 7.24.1 Reset
  - 7.24.2 Brownout detection
  - 7.24.3 Code security (Code Read Protection - CRP)
  - 7.24.4 AHB
  - 7.24.5 External interrupt inputs
  - 7.24.6 Memory mapping control
- 7.25 Emulation and debugging
  - 7.25.1 EmbeddedICE
  - 7.25.2 Embedded trace
  - 7.25.3 RealMonitor
8. Limiting values
9. Thermal characteristics
10. Static characteristics
- 10.1 Power-down mode
- 10.2 Deep power-down mode
- 10.3 Electrical pin characteristics
11. Dynamic characteristics
- 11.1 Internal oscillators
- 11.2 I/O pins
- 11.3 USB interface
- 11.4 Flash memory
- 11.5 Timing
12. ADC electrical characteristics
13. DAC electrical characteristics
14. Application information
- 14.1 Suggested USB interface solutions
- 14.2 Crystal oscillator XTAL input and component selection
- 14.3 RTC 32 kHz oscillator component selection
- 14.4 XTAL and RTCX Printed Circuit Board (PCB) layout guidelines
- 14.5 Standard I/O pin configuration
- 14.6 Reset pin configuration
15. Package outline
16. Abbreviations
17. Revision history
18. Legal information
- 18.1 Data sheet status
- 18.2 Definitions
- 18.3 Disclaimers
- 18.4 Trademarks
19. Contact information
20. Contents

1. General description

The LPC2361/2362 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S CPU with

real-time emulation that combines the microcontroller with up to 128 kB of embedded

high-speed flash memory. A 128-bit wide memory interface and a unique accelerator

architecture enable 32-bit code execution at the maximum clock rate. For critical

performance in interrupt service routines and DSP algorithms, this increases performance

up to 30 % over Thumb mode. For critical code size applications, the alternative 16-bit

Thumb mode reduces code by more than 30 % with minimal performance penalty.

The LPC2361/2362 are ideal for multi-purpose serial communication applications. They

incorporate a 10/100 Ethernet Media Access Controller (MAC) (LPC2362 only), USB full

speed device with 4 kB of endpoint RAM, four UARTs, two CAN channels, an SPI

interface, two Synchronous Serial Ports (SSP), three I

C interfaces, and an I

S interface.

This blend of serial communications interfaces combined with an on-chip 4 MHz internal

oscillator, SRAM of up to 32 kB, 16 kB SRAM for Ethernet (available as general purpose

SRAM for the LPC2361), 8 kB SRAM for USB and general purpose use, together with

2 kB battery powered SRAM make these devices very well suited for communication

gateways and protocol converters. Various 32-bit timers, an improved 10-bit ADC, 10-bit

DAC, one PWM unit, a CAN control unit, and up to 70 fast GPIO lines with up to 12 edge

or level sensitive external interrupt pins make these microcontrollers particularly suitable

for industrial control and medical systems.

2. Features and benefits

 ARM7TDMI-S processor, running at up to 72 MHz.

 Up to 128 kB on-chip flash program memory with In-System Programming (ISP) and

In-Application Programming (IAP) capabilities. Flash program memory is on the ARM

local bus for high performance CPU access.

 8 kB (LPC2361) or 32 kB (LPC2362) of SRAM on the ARM local bus for high

performance CPU access.

 16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM.

 8 kB SRAM for general purpose DMA use; also accessible by the USB.

 Dual Advanced High-performance Bus (AHB) system that provides for simultaneous

Ethernet DMA (LPC2362 only), USB DMA, and program execution from on-chip flash

with no contention between those functions. A bus bridge allows the Ethernet DMA to

access the other AHB subsystem.

 Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.

 General Purpose DMA controller (GPDMA) on AHB that can be used with the SSP

serial interfaces, the I

S port, as well as for memory-to-memory transfers.

LPC2361/2362

Single-chip 16-bit/32-bit MCU; up to 128 kB flash with ISP/IAP,

Ethernet, USB 2.0 device/host/OTG, CAN, and 10-bit ADC/DAC

Rev. 5.1 — 15 October 2013 Product data sheet

Summary of content (65 pages)

PAGE 1
LPC2361/2362 Single-chip 16-bit/32-bit MCU; up to 128 kB flash with ISP/IAP, Ethernet, USB 2.0 device/host/OTG, CAN, and 10-bit ADC/DAC Rev. 5.1 — 15 October 2013 Product data sheet 1. General description The LPC2361/2362 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation that combines the microcontroller with up to 128 kB of embedded high-speed flash memory.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU  Serial interfaces:  Ethernet MAC with associated DMA controller (LPC2362 only). These functions reside on an independent AHB.  USB 2.0 device/host/OTG with on-chip PHY and associated DMA controller.  Four UARTs with fractional baud rate generation, one with modem control I/O, one with IrDA support, all with FIFO.  CAN controller with two channels.  SPI controller.  Two SSP controllers, with FIFO and multi-protocol capabilities.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU  On-chip PLL allows CPU operation up to the maximum CPU rate without the need for a high frequency crystal. May be run from the main oscillator, the internal RC oscillator, or the RTC oscillator.  Versatile pin function selections allow more possibilities for using on-chip peripheral functions. 3. Applications     Industrial control Medical systems Protocol converter Communications 4. Ordering information Table 1.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 5.
PAGE 5
LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 6. Pinning information 76 100 6.1 Pinning 1 75 LPC2361FBD100 LPC2362FBD100 Fig 2. 50 51 26 25 002aad965 LPC2361/2362 pinning 6.2 Pin description Table 3.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU Table 3. Pin description …continued Symbol Pin Type Description P0[5]/I2SRX_WS/ TD2/CAP2[1] 80[1] I/O P0[5] — General purpose digital input/output pin. I/O I2SRX_WS — Receive Word Select. It is driven by the master and received by the slave. Corresponds to the signal WS in the I2S-bus specification. O TD2 — CAN2 transmitter output. I CAP2[1] — Capture input for Timer 2, channel 1.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU Table 3. Pin description …continued Symbol Pin Type Description P0[17]/CTS1/ MISO0/MISO 61[1] I/O P0[17] — General purpose digital input/output pin. I CTS1 — Clear to Send input for UART1. I/O MISO0 — Master In Slave Out for SSP0. I/O MISO — Master In Slave Out for SPI. I/O P0[18] — General purpose digital input/output pin. I DCD1 — Data Carrier Detect input for UART1. I/O MOSI0 — Master Out Slave In for SSP0.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU Table 3. Pin description …continued Symbol Pin Type Description P0[28]/SCL0 24[4] I/O P0[28] — General purpose digital input/output pin. Output is open-drain. I/O SCL0 — I2C0 clock input/output. Open-drain output (for I2C-bus compliance). I/O P0[29] — General purpose digital input/output pin. I/O USB_D+ — USB bidirectional D+ line. I/O P0[30] — General purpose digital input/output pin. I/O USB_D — USB bidirectional D line.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU Table 3. Pin description …continued Symbol Pin Type Description P1[20]/ USB_TX_DP1/ PWM1[2]/SCK0 34[1] I/O P1[20] — General purpose digital input/output pin. O USB_TX_DP1 — D+ transmit data for USB port 1 (OTG transceiver). O PWM1[2] — Pulse Width Modulator 1, channel 2 output. I/O SCK0 — Serial clock for SSP0. P1[21]/ USB_TX_DM1/ PWM1[3]/SSEL0 35[1] I/O P1[21] — General purpose digital input/output pin.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU Table 3. Pin description …continued Symbol Pin Type Description P1[30]/VBUS/AD0[4] 21[2] I/O P1[30] — General purpose digital input/output pin. I VBUS — Monitors the presence of USB bus power. I AD0[4] — A/D converter 0, input 4. I/O P1[31] — General purpose digital input/output pin. I/O SCK1 — Serial Clock for SSP1. I AD0[5] — A/D converter 0, input 5.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU Table 3. Pin description …continued Symbol Pin Type Description P2[7]/RD2/RTS1/ TRACEPKT2 66[1] I/O P2[7] — General purpose digital input/output pin. I RD2 — CAN2 receiver input. O RTS1 — Request to Send output for UART1. O TRACEPKT2 — Trace Packet, bit 2. I/O P2[8] — General purpose digital input/output pin. O TD2 — CAN2 transmitter output. O TXD2 — Transmitter output for UART2. O TRACEPKT3 — Trace Packet, bit 3.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU Table 3. Pin description …continued Symbol Pin Type Description P4[28]/MAT2[0]/ TXD3 82[1] I/O P4[28] — General purpose digital input/output pin. O MAT2[0] — Match output for Timer 2, channel 0. O TXD3 — Transmitter output for UART3. P4[29]/MAT2[1]/ RXD3 85[1] TDO 1[1][7] TDI 2[1][8] TMS 3[1][8] I/O P4[29] — General purpose digital input/output pin. O MAT2[1] — Match output for Timer 2, channel 1.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU [3] 5 V tolerant pad providing digital I/O with TTL levels and hysteresis and analog output function. When configured as the DAC output, digital section of the pad is disabled. [4] Open-drain 5 V tolerant digital I/O pad, compatible with I2C-bus 400 kHz specification. This pad requires an external pull-up to provide output functionality.
PAGE 14
LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU The ARM7TDMI-S processor is a general purpose 32-bit microprocessor, which offers high performance and very low power consumption. The ARM architecture is based on Reduced Instruction Set Computer (RISC) principles, and the instruction set and related decode mechanism are much simpler than those of microprogrammed complex instruction set computers.
PAGE 15
LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 7.4 Memory map The LPC2361/2362 memory map incorporates several distinct regions as shown in Figure 3. In addition, the CPU interrupt vectors may be remapped to allow them to reside in either flash memory (default), boot ROM, or SRAM (see Section 7.24.6). 0xFFFF FFFF 4.0 GB AHB PERIPHERALS 0xF000 0000 3.75 GB APB PERIPHERALS 3.5 GB 0xE000 0000 3.0 GB 0xC000 0000 RESERVED ADDRESS SPACE 2.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 7.5 Interrupt controller The ARM processor core has two interrupt inputs called Interrupt Request (IRQ) and Fast Interrupt Request (FIQ). The VIC takes 32 interrupt request inputs which can be programmed as FIQ or vectored IRQ types. The programmable assignment scheme means that priorities of interrupts from the various peripherals can be dynamically assigned and adjusted. FIQs have the highest priority.
PAGE 17
LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU example, a bidirectional port requires one stream for transmit and one for receive. The source and destination areas can each be either a memory region or a peripheral, and can be accessed through the AHB master. 7.7.1 Features • Two DMA channels. Each channel can support a unidirectional transfer. • The GPDMA can transfer data between the 8 kB SRAM and peripherals such as the two SSP, and I2S interfaces.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU • GPIO registers are relocated to the ARM local bus so that the fastest possible I/O timing can be achieved. • Mask registers allow treating sets of port bits as a group, leaving other bits unchanged. • All GPIO registers are byte and half-word addressable. • Entire port value can be written in one instruction.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU • Memory management: – Independent transmit and receive buffers memory mapped to shared SRAM. – DMA managers with scatter/gather DMA and arrays of frame descriptors. – Memory traffic optimized by buffering and pre-fetching. • Enhanced Ethernet features: – Receive filtering. – Multicast and broadcast frame support for both transmit and receive.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU • Scalable realization of endpoints at run time. • Endpoint Maximum packet size selection (up to USB maximum specification) by software at run time. • Supports SoftConnect and GoodLink features. • While the USB is in the Suspend mode, the LPC2361/2362 can enter one of the reduced power modes and wake up on USB activity. • Supports DMA transfers with the DMA RAM of 16 kB on all non-control endpoints.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU Each CAN controller has a register structure similar to the NXP SJA1000 and the PeliCAN Library block, but the 8-bit registers of those devices have been combined in 32-bit words to allow simultaneous access in the ARM environment.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 7.14 UARTs The LPC2361/2362 each contain four UARTs. In addition to standard transmit and receive data lines, UART1 also provides a full modem control handshake interface. The UARTs include a fractional baud rate generator. Standard baud rates such as 115200 Bd can be achieved with any crystal frequency above 2 MHz. 7.14.1 Features • • • • 16 B Receive and Transmit FIFOs. Register locations conform to 16C550 industry standard.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU • • • • • Synchronous serial communication Master or slave operation 8-frame FIFOs for both transmit and receive 4-bit to 16-bit frame DMA transfers supported by GPDMA 7.17 I2C-bus serial I/O controllers The LPC2361/2362 each contain three I2C-bus controllers. The I2C-bus is bidirectional, for inter-IC control using only two wires: a serial clock line (SCL), and a serial data line (SDA).
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 7.18.1 Features • The interface has separate input/output channels each of which can operate in master or slave mode. • Capable of handling 8-bit, 16-bit, and 32-bit word sizes. • Mono and stereo audio data supported. • The sampling frequency can range from 16 kHz to 48 kHz (16 kHz, 22.05 kHz, 32 kHz, 44.1 kHz or 48 kHz). • • • • Configurable word select period in master mode (separately for I2S input and output).
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 7.20 Pulse width modulator The PWM is based on the standard Timer block and inherits all of its features, although only the PWM function is pinned out on the LPC2361/2362. The Timer is designed to count cycles of the system derived clock and optionally switch pins, generate interrupts or perform other actions when specified timer values occur, based on seven match registers.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU • Match register updates are synchronized with pulse outputs to prevent generation of erroneous pulses. Software must ‘release’ new match values before they can become effective. • May be used as a standard timer if the PWM mode is not enabled. • A 32-bit Timer/Counter with a programmable 32-bit Prescaler. 7.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU • Dedicated 32 kHz oscillator or programmable prescaler from APB clock. • Dedicated power supply pin can be connected to a battery or to the main 3.3 V. • Periodic interrupts can be generated from increments of any field of the time registers, and selected fractional second values. • 2 kB data SRAM powered by VBAT. • RTC and battery RAM power supply is isolated from the rest of the chip. 7.23 Clocking and power control 7.23.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU Following the PLL input divider is the PLL multiplier. This can multiply the input divider output through the use of a Current Controlled Oscillator (CCO) by a value ‘M’, in the range of 1 through 32768. The resulting frequency must be in the range of 275 MHz to 550 MHz. The multiplier works by dividing the CCO output by the value of M, then using a phase-frequency detector to compare the divided CCO output to the multiplier input.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 7.23.4.1 Idle mode In Idle mode, execution of instructions is suspended until either a Reset or interrupt occurs. Peripheral functions continue operation during Idle mode and may generate interrupts to cause the processor to resume execution. Idle mode eliminates dynamic power used by the processor itself, memory systems and related controllers, and internal buses. 7.23.4.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU While in Deep power-down mode, external device power may be removed. In this case, the LPC2361/2362 will start up when external power is restored. Essential data may be retained through Deep power-down mode (or through complete powering off of the chip) by storing data in the Battery RAM, as long as the external power to the VBAT pin is maintained. 7.23.4.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 7.24.2 Brownout detection The LPC2361/2362 includes 2-stage monitoring of the voltage on the VDD(DCDC)(3V3) pins. If this voltage falls below 2.95 V, the BOD asserts an interrupt signal to the Vectored Interrupt Controller. This signal can be enabled for interrupt in the Interrupt Enable Register in the VIC in order to cause a CPU interrupt; if not, software can monitor the signal by reading a dedicated status register.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU The second AHB, referred to as AHB2, includes only the Ethernet block and an associated 16 kB SRAM. In addition, a bus bridge is provided that allows the secondary AHB to be a bus master on AHB1, allowing expansion of Ethernet buffer space into unused space in memory residing on AHB1. In summary, bus masters with access to AHB1 are the ARM7 itself, the USB block, the GPDMA function, and the Ethernet block (via the bus bridge from AHB2).
PAGE 33
LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU outputs information about processor execution to a trace port. A software debugger allows configuration of the ETM using a JTAG interface and displays the trace information that has been captured. The ETM is connected directly to the ARM core and not to the main AMBA system bus. It compresses the trace information and exports it through a narrow trace port.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).[1] Symbol Parameter Conditions Min Max Unit VDD(3V3) supply voltage (3.3 V) core and external rail 3.0 3.6 V VDD(DCDC)(3V3) DC-to-DC converter supply voltage (3.3 V) VDDA analog 3.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 9. Thermal characteristics The average chip junction temperature, Tj (C), can be calculated using the following equation: T j = T amb +  P D  R th  j – a   (1) • Tamb = ambient temperature (C), • Rth(j-a) = the package junction-to-ambient thermal resistance (C/W) • PD = sum of internal and I/O power dissipation The internal power dissipation is the product of IDD and VDD.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 10. Static characteristics Table 7. Static characteristics Tamb = 40 C to +85 C for commercial applications, unless otherwise specified. Symbol Parameter Conditions Min Typ[1] Max Unit VDD(3V3) supply voltage (3.3 V) core and external rail 3.0 3.3 3.6 V VDD(DCDC)(3V3) DC-to-DC converter supply voltage (3.3 V) 3.0 3.3 3.6 V VDDA analog 3.3 V pad supply voltage 3.0 3.3 3.6 V Vi(VBAT) input voltage on pin VBAT 2.0 3.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU Table 7. Static characteristics …continued Tamb = 40 C to +85 C for commercial applications, unless otherwise specified. Symbol Parameter Conditions Min Typ[1] Max Unit Ilatch I/O latch-up current (0.5VDD(3V3)) < VI < (1.5VDD(3V3)); - - 100 mA 0 - 5.5 V Tj < 125 C input voltage VI pin configured to provide a digital function [5][6] [7][8] VO output voltage 0 - VDD(3V3) V VIH HIGH-level input voltage 2.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU Table 7. Static characteristics …continued Tamb = 40 C to +85 C for commercial applications, unless otherwise specified. Parameter Conditions Min Typ[1] Max Unit IOZ OFF-state output current 0 V < VI < 3.3 V - - 10 A VBUS bus supply voltage - - 5.25 V VDI differential input sensitivity voltage (D+)  (D) 0.2 - - V VCM differential common mode voltage range includes VDI range 0.8 - 2.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 10.1 Power-down mode 002aae049 4 IDD(IO) (μA) 2 VDD(3V3) = 3.3 V VDD(3V3) = 3.0 V 0 −2 −4 −40 −15 10 35 60 85 temperature (°C) Vi(VBAT) = VDD(DCDC)(3V3) = 3.3 V; Tamb = 25 C. Fig 4. I/O maximum supply current IDD(IO) versus temperature in Power-down mode 002aae050 40 IBAT (μA) 30 Vi(VBAT) = 3.3 V Vi(VBAT) = 3.0 V 20 10 0 −40 −15 10 35 60 85 temperature (°C) VDD(3V3) = VDD(DCDC)(3V3) = 3.3 V; Tamb = 25 C. Fig 5.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 002aae051 800 IDD(DCDC)pd(3v3) (μA) 600 400 VDD(DCDC)(3V3) = 3.3 V 200 0 −40 VDD(DCDC)(3V3) = 3.0 V −15 10 35 60 85 temperature (°C) VDD(3V3) = Vi(VBAT) = 3.3 V; Tamb = 25 C. Fig 6. Total DC-to-DC converter supply current IDD(DCDC)pd(3V3) at different temperatures in Power-down mode 10.2 Deep power-down mode 002aae046 300 IDD(IO) (μA) 200 100 VDD(3V3) = 3.3 V VDD(3V3) = 3.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 002aae047 40 IBAT (μA) 30 Vi(VBAT) = 3.3 V Vi(VBAT) = 3.0 V 20 10 0 −40 −15 10 35 60 85 temperature (°C) VDD(3V3) = VDD(DCDC)(3V3) = 3.3 V; Tamb = 25 C Fig 8. RTC battery maximum supply current IBAT versus temperature in Deep power-down mode 002aae048 100 IDD(DCDC)dpd(3v3) (μA) 80 60 VDD(DCDC)(3V3) = 3.3 V 40 VDD(DCDC)(3V3) = 3.0 V 20 0 −40 −15 10 35 60 85 temperature (°C) VDD(3V3) = Vi(VBAT) = 3.3 V; Tamb = 25 C. Fig 9.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 10.3 Electrical pin characteristics 002aaf112 3.6 VOH (V) T = 85 °C 25 °C −40 °C 3.2 2.8 2.4 2.0 0 8 16 24 IOH (mA) Conditions: VDD(3V3) = 3.3 V; standard port pins. Fig 10. Typical HIGH-level output voltage VOH versus HIGH-level output source current IOH 002aaf111 15 IOL (mA) T = 85 °C 25 °C −40 °C 10 5 0 0 0.2 0.4 0.6 VOL (V) Conditions: VDD(3V3) = 3.3 V; standard port pins. Fig 11.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 11. Dynamic characteristics Table 8. Dynamic characteristics Tamb = 40 C to +85 C for commercial applications; VDD(3V3) over specified ranges.[1] Symbol Parameter Typ[2] Conditions Min Max Unit CCLK; 40 C to +85 C 1 - 72 MHz IRC; 40 C to +85 C 3.96 4 4.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 11.1 Internal oscillators Table 9. Dynamic characteristic: internal oscillators Tamb = 40 C to +85 C; 3.0 V  VDD(3V3)  3.6 V.[1] Symbol Parameter Conditions Min Typ[2] Max Unit fosc(RC) internal RC oscillator frequency - 3.96 4.02 4.04 MHz fi(RTC) RTC input frequency - - 32.768 - kHz Max Unit [1] Parameters are valid over operating temperature range unless otherwise specified.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 11.4 Flash memory Table 12. Dynamic characteristics of flash Tamb = 40 C to +85 C, unless otherwise specified; VDD(3V3) = 3.0 V to 3.6 V; all voltages are measured with respect to ground.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU shifting edges SCK sampling edges MOSI MISO tsu(SPI_MISO) 002aad326 Fig 14. MISO line set-up time in SSP Master mode LPC2361_62 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5.1 — 15 October 2013 © NXP B.V. 2013. All rights reserved.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 12. ADC electrical characteristics Table 13. ADC characteristics VDDA = 2.5 V to 3.6 V; Tamb = 40 C to +85 C, unless otherwise specified; ADC frequency 4.5 MHz.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU offset error EO gain error EG 1023 1022 1021 1020 1019 1018 (2) 7 code out (1) 6 5 (5) 4 (4) 3 (3) 2 1 LSB (ideal) 1 0 1 2 3 4 5 6 7 1018 1019 1020 1021 1022 1023 1024 VIA (LSBideal) offset error EO 1 LSB = Vi(VREF) − VSSA 1024 002aae604 (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity error (ED). (4) Integral non-linearity (EL(adj)).
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU LPC23XX 20 kΩ AD0[y] AD0[y]SAMPLE 3 pF Rvsi 5 pF VEXT VSS 002aac610 Fig 16. Suggested ADC interface - LPC2361/2362 AD0[y] pin 13. DAC electrical characteristics Table 14. DAC electrical characteristics VDDA = 2.7 V to 3.6 V; Tamb = 40 C to +85 C unless otherwise specified Symbol Parameter ED Min Typ Max Unit differential linearity error - 1 - LSB EL(adj) integral non-linearity - 1.5 - LSB EO offset error - 0.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 14. Application information 14.1 Suggested USB interface solutions VDD(3V3) USB_UP_LED USB_CONNECT LPC23XX SoftConnect switch R1 1.5 kΩ VBUS USB_D+ RS = 33 Ω USB-B connector USB_D− RS = 33 Ω VSS 002aac578 Fig 17. LPC2361/2362 USB interface on a self-powered device VDD(3V3) R2 LPC23XX USB_UP_LED R1 1.5 kΩ VBUS USB_D+ RS = 33 Ω USB-B connector USB_D− RS = 33 Ω VSS 002aac579 Fig 18.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU VDD R1 R2 R3 R4 RSTOUT RESET_N VBUS ADR/PSW ID OE_N/INT_N VDD SPEED SUSPEND LPC2361/62 R4 R5 DP 33 Ω DM 33 Ω Mini-AB connector ISP1302 R6 VSS SCL USB_SCL1 SDA USB_SDA1 INT_N EINTn USB_D+ USB_D− 002aad966 Fig 19.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU VDD USB_UP_LED VDD LPC2361/62 USB_CONNECT VSS USB_D+ 33 Ω D+ USB_D− 33 Ω D− VBUS USB-B connector VBUS 002aad968 Fig 21. LPC2361/2362 USB device port configuration 14.2 Crystal oscillator XTAL input and component selection The input voltage to the on-chip oscillators is limited to 1.8 V. If the oscillator is driven by a clock in slave mode, it is recommended that the input be coupled through a capacitor with Ci = 100 pF.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU LPC2xxx L XTAL1 XTAL2 = CL CP XTAL RS CX2 CX1 002aag469 Fig 23. Oscillator modes and models: oscillation mode of operation and external crystal model used for CX1/CX2 evaluation Table 15.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 14.3 RTC 32 kHz oscillator component selection LPC2xxx L RTCX1 RTCX2 = CL CP 32 kHz XTAL RS CX1 CX2 002aaf495 Fig 24. RTC oscillator modes and models: oscillation mode of operation and external crystal model used for CX1/CX2 evaluation The RTC external oscillator circuit is shown in Figure 24.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 14.5 Standard I/O pin configuration Figure 25 shows the possible pin modes for standard I/O pins with analog input function: • • • • Digital output driver Digital input: Pull-up enabled/disabled Digital input: Pull-down enabled/disabled Analog input (for ADC input channels) The default configuration for standard I/O pins is input with pull-up enabled.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 14.6 Reset pin configuration VDD VDD VDD Rpu reset ESD 20 ns RC GLITCH FILTER PIN ESD VSS 002aaf274 Fig 26. Reset pin configuration LPC2361_62 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5.1 — 15 October 2013 © NXP B.V. 2013. All rights reserved.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 15. Package outline LQFP100: plastic low profile quad flat package; 100 leads; body 14 x 14 x 1.4 mm SOT407-1 c y X A 51 75 50 76 ZE e E HE A A2 (A 3) A1 w M θ bp Lp pin 1 index L 100 detail X 26 1 25 ZD e v M A w M bp D B HD v M B 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e mm 1.6 0.15 0.05 1.45 1.35 0.25 0.27 0.17 0.20 0.09 14.1 13.9 14.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 16. Abbreviations Table 18.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 17. Revision history Table 19. Revision history Document ID Release date Data sheet status Change notice Supersedes LPC2361_62 v.5.1 20131015 Product data sheet - LPC2361_62 v.5 Modifications: LPC2361_62 v.5 Modifications: • • Table 3 “Pin description”, Table note 6: Changed glitch filter spec from 5 ns to 10 ns. Table 8 “Dynamic characteristics”: Changed min clock cycle time from 42 to 40.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU Table 19. Revision history …continued Document ID Modifications: LPC2361_62 Product data sheet Release date Data sheet status Change notice Supersedes • • • • • Table 3 “Pin description”: Added table note for XTAL1 and XTAL2 pins. • • • • Table 6 “Dynamic characteristics”: Added ARM processor clock frequency information. • • • • • • • Added Section 7.23.4.4 “Deep power-down mode”.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU Table 19. Revision history …continued Document ID Release date Data sheet status Change notice Supersedes LPC2361_62 v.3 20081111 Product data sheet - LPC2361_62 v.2 - LPC2361_62 v.1 Modifications: LPC2361_62 v.2 Modifications: LPC2361_62 v.1 LPC2361_62 Product data sheet • Figure 3: corrected memory map. 20081016 Product data sheet • • • Clarify Ethernet availability between devices throughout data sheet.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 18. Legal information 18.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use.
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 4.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . .
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LPC2361/62 NXP Semiconductors Single-chip 16-bit/32-bit MCU 14 14.1 14.2 14.3 14.4 14.5 14.6 15 16 17 18 18.1 18.2 18.3 18.4 19 20 Application information. . . . . . . . . . . . . . . . . . Suggested USB interface solutions . . . . . . . . Crystal oscillator XTAL input and component selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RTC 32 kHz oscillator component selection . . XTAL and RTCX Printed Circuit Board (PCB) layout guidelines . . . . . . . . . . . . . . . . . . . . . . .