Datasheet
Table Of Contents
- 1. General description
- 2. Features and benefits
- 3. Applications
- 4. Ordering information
- 5. Block diagram
- 6. Pinning information
- 7. Functional description
- 7.1 Architectural overview
- 7.2 On-chip flash programming memory
- 7.3 On-chip SRAM
- 7.4 Memory map
- 7.5 Interrupt controller
- 7.6 Pin connect block
- 7.7 General purpose DMA controller
- 7.8 Fast general purpose parallel I/O
- 7.9 Ethernet (LPC2362 only)
- 7.10 USB interface
- 7.11 CAN controller and acceptance filters
- 7.12 10-bit ADC
- 7.13 10-bit DAC
- 7.14 UARTs
- 7.15 SPI serial I/O controller
- 7.16 SSP serial I/O controller
- 7.17 I2C-bus serial I/O controllers
- 7.18 I2S-bus serial I/O controllers
- 7.19 General purpose 32-bit timers/external event counters
- 7.20 Pulse width modulator
- 7.21 Watchdog timer
- 7.22 RTC and battery RAM
- 7.23 Clocking and power control
- 7.24 System control
- 7.25 Emulation and debugging
- 8. Limiting values
- 9. Thermal characteristics
- 10. Static characteristics
- 11. Dynamic characteristics
- 12. ADC electrical characteristics
- 13. DAC electrical characteristics
- 14. Application information
- 15. Package outline
- 16. Abbreviations
- 17. Revision history
- 18. Legal information
- 19. Contact information
- 20. Contents
LPC2361_62 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5.1 — 15 October 2013 60 of 65
NXP Semiconductors
LPC2361/62
Single-chip 16-bit/32-bit MCU
Modifications: • Table 3 “Pin description”: Added table note for XTAL1 and XTAL2 pins.
• Table 4 “Limiting values”: Changed V
ESD
min/max to 2500/+2500.
• Table 5 “Static characteristics”: Updated min, typical and max values for oscillator pins.
• Table 5 “Static characteristics”: Added table note for Z
DRV
.
• Table 5 “Static characteristics”: Updated conditions and typical values for
I
DD(DCDC)dpd(3V3)
, I
BATact
, and I
BAT
.
• Table 6 “Dynamic characteristics”: Added ARM processor clock frequency information.
• Added Table 8 “Dynamic characteristics of flash”.
• Added Table 10 “DAC electrical characteristics”.
• Section 7.2 “On-chip flash programming memory”: Removed text regarding flash
endurance minimum specs.
• Added Section 7.23.4.4 “Deep power-down mode”.
• Section 7.24.2 “Brownout detection”: Changed V
DD(3V3)
to V
DD(DCDC)(3V3)
.
• Added Section 9.1 “Power-down mode”.
• Added Section 9.2 “Deep power-down mode”.
• Added Section 13.2 “XTAL1 input”.
• Added Section 13.3 “XTAL and RTC Printed Circuit Board (PCB) layout guidelines”.
• Figure 13 “ADC characteristics”: Changed V
DDA
to V
i(VREF)
.
Table 19. Revision history
…continued
Document ID Release date Data sheet status Change notice Supersedes