Datasheet
Table Of Contents
- 1. General description
- 2. Features and benefits
- 3. Applications
- 4. Ordering information
- 5. Block diagram
- 6. Pinning information
- 7. Functional description
- 7.1 Architectural overview
- 7.2 On-chip flash programming memory
- 7.3 On-chip SRAM
- 7.4 Memory map
- 7.5 Interrupt controller
- 7.6 Pin connect block
- 7.7 General purpose DMA controller
- 7.8 Fast general purpose parallel I/O
- 7.9 Ethernet (LPC2362 only)
- 7.10 USB interface
- 7.11 CAN controller and acceptance filters
- 7.12 10-bit ADC
- 7.13 10-bit DAC
- 7.14 UARTs
- 7.15 SPI serial I/O controller
- 7.16 SSP serial I/O controller
- 7.17 I2C-bus serial I/O controllers
- 7.18 I2S-bus serial I/O controllers
- 7.19 General purpose 32-bit timers/external event counters
- 7.20 Pulse width modulator
- 7.21 Watchdog timer
- 7.22 RTC and battery RAM
- 7.23 Clocking and power control
- 7.24 System control
- 7.25 Emulation and debugging
- 8. Limiting values
- 9. Thermal characteristics
- 10. Static characteristics
- 11. Dynamic characteristics
- 12. ADC electrical characteristics
- 13. DAC electrical characteristics
- 14. Application information
- 15. Package outline
- 16. Abbreviations
- 17. Revision history
- 18. Legal information
- 19. Contact information
- 20. Contents
LPC2361_62 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5.1 — 15 October 2013 7 of 65
NXP Semiconductors
LPC2361/62
Single-chip 16-bit/32-bit MCU
P0[17]/CTS1/
MISO0/MISO
61
[1]
I/O P0[17] — General purpose digital input/output pin.
I CTS1 — Clear to Send input for UART1.
I/O MISO0 — Master In Slave Out for SSP0.
I/O MISO — Master In Slave Out for SPI.
P0[18]/DCD1/
MOSI0/MOSI
60
[1]
I/O P0[18] — General purpose digital input/output pin.
I DCD1 — Data Carrier Detect input for UART1.
I/O MOSI0 — Master Out Slave In for SSP0.
I/O MOSI — Master Out Slave In for SPI.
P0[19]/DSR1/SDA1 59
[1]
I/O P0[19] — General purpose digital input/output pin.
I DSR1 — Data Set Ready input for UART1.
I/O SDA1 — I
2
C1 data input/output (this is not an open-drain pin).
P0[20]/DTR1/SCL1 58
[1]
I/O P0[20] — General purpose digital input/output pin.
O DTR1 — Data Terminal Ready output for UART1.
I/O SCL1 — I
2
C1 clock input/output (this is not an open-drain pin).
P0[21]/RI1/RD1 57
[1]
I/O P0[21] — General purpose digital input/output pin.
I RI1 — Ring Indicator input for UART1.
I RD1 — CAN1 receiver input.
P0[22]/RTS1/TD1 56
[1]
I/O P0[22] — General purpose digital input/output pin.
O RTS1 — Request to Send output for UART1.
O TD1 — CAN1 transmitter output.
P0[23]/AD0[0]/
I2SRX_CLK/
CAP3[0]
9
[2]
I/O P0[23] — General purpose digital input/output pin.
I AD0[0] — A/D converter 0, input 0.
I/O I2SRX_CLK — Receive Clock. It is driven by the master and received by the
slave. Corresponds to the signal SCK in the I
2
S-bus specification.
I CAP3[0] — Capture input for Timer 3, channel 0.
P0[24]/AD0[1]/
I2SRX_WS/
CAP3[1]
8
[2]
I/O P0[24] — General purpose digital input/output pin.
I AD0[1] — A/D converter 0, input 1.
I/O I2SRX_WS — Receive Word Select. It is driven by the master and received by the
slave. Corresponds to the signal WS in the I
2
S-bus specification.
I CAP3[1] — Capture input for Timer 3, channel 1.
P0[25]/AD0[2]/
I2SRX_SDA/
TXD3
7
[2]
I/O P0[25] — General purpose digital input/output pin.
I AD0[2] — A/D converter 0, input 2.
I/O I2SRX_SDA — Receive data. It is driven by the transmitter and read by the
receiver. Corresponds to the signal SD in the I
2
S-bus specification.
O TXD3 — Transmitter output for UART3.
P0[26]/AD0[3]/
AOUT/RXD3
6
[3]
I/O P0[26] — General purpose digital input/output pin.
I AD0[3] — A/D converter 0, input 3.
O AOUT — D/A converter output.
I RXD3 — Receiver input for UART3.
P0[27]/SDA0 25
[4]
I/O P0[27] — General purpose digital input/output pin. Output is open-drain.
I/O SDA0 — I
2
C0 data input/output. Open-drain output (for I
2
C-bus compliance).
Table 3. Pin description
…continued
Symbol Pin Type Description
