Datasheet
Table Of Contents
- 1. General description
- 2. Features and benefits
- 3. Applications
- 4. Ordering information
- 5. Block diagram
- 6. Pinning information
- 7. Functional description
- 7.1 Architectural overview
- 7.2 On-chip flash programming memory
- 7.3 On-chip SRAM
- 7.4 Memory map
- 7.5 Interrupt controller
- 7.6 Pin connect block
- 7.7 General purpose DMA controller
- 7.8 Fast general purpose parallel I/O
- 7.9 Ethernet (LPC2362 only)
- 7.10 USB interface
- 7.11 CAN controller and acceptance filters
- 7.12 10-bit ADC
- 7.13 10-bit DAC
- 7.14 UARTs
- 7.15 SPI serial I/O controller
- 7.16 SSP serial I/O controller
- 7.17 I2C-bus serial I/O controllers
- 7.18 I2S-bus serial I/O controllers
- 7.19 General purpose 32-bit timers/external event counters
- 7.20 Pulse width modulator
- 7.21 Watchdog timer
- 7.22 RTC and battery RAM
- 7.23 Clocking and power control
- 7.24 System control
- 7.25 Emulation and debugging
- 8. Limiting values
- 9. Thermal characteristics
- 10. Static characteristics
- 11. Dynamic characteristics
- 12. ADC electrical characteristics
- 13. DAC electrical characteristics
- 14. Application information
- 15. Package outline
- 16. Abbreviations
- 17. Revision history
- 18. Legal information
- 19. Contact information
- 20. Contents
LPC2361_62 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5.1 — 15 October 2013 36 of 65
NXP Semiconductors
LPC2361/62
Single-chip 16-bit/32-bit MCU
10. Static characteristics
Table 7. Static characteristics
T
amb
=
40
C to +85
C for commercial applications, unless otherwise specified.
Symbol Parameter Conditions Min Typ
[1]
Max Unit
V
DD(3V3)
supply voltage (3.3 V) core and external rail 3.0 3.3 3.6 V
V
DD(DCDC)(3V3)
DC-to-DC converter
supply voltage (3.3 V)
3.0 3.3 3.6 V
V
DDA
analog 3.3 V pad supply
voltage
3.0 3.3 3.6 V
V
i(VBAT)
input voltage on pin
VBAT
[2]
2.0 3.3 3.6 V
V
i(VREF)
input voltage on pin
VREF
2.5 3.3 V
DDA
V
I
DD(DCDC)act(3V3)
active mode DC-to-DC
converter supply
current (3.3 V)
V
DD(DCDC)(3V3)
=3.3V;
T
amb
=25C; code
while(1){}
executed from flash; no
peripherals enabled;
PCLK = CCLK
CCLK = 10 MHz - 15 - mA
CCLK = 72 MHz - 63 - mA
all peripherals enabled;
PCLK = CCLK / 8
CCLK = 10 MHz - 21 - mA
CCLK = 72 MHz - 92 - mA
all peripherals enabled;
PCLK = CCLK
CCLK = 10 MHz - 27 - mA
CCLK = 72 MHz - 125 - mA
I
DD(DCDC)pd(3V3)
Power-down mode
DC-to-DC converter
supply current (3.3 V)
V
DD(DCDC)(3V3)
= 3.3 V;
T
amb
=25C
[3]
-113-A
I
DD(DCDC)dpd(3V3)
Deep power-down
mode DC-to-DC
converter supply
current (3.3 V)
[3]
-20-A
I
BATact
active mode battery
supply current
[4]
-20-A
I
BAT
battery supply current Deep power-down mode
[3]
-20-A
Standard port pins, RESET
, RTCK
I
IL
LOW-level input current V
I
= 0 V; no pull-up - - 3 A
I
IH
HIGH-level input
current
V
I
=V
DD(3V3)
; no
pull-down
-- 3A
I
OZ
OFF-state output
current
V
O
=0V; V
O
=V
DD(3V3)
;
no pull-up/down
-- 3A
