Datasheet

Preliminary data sheet Rev. 00.01 — 23 October 2007 25 of 57

NXP Semiconductors

LPC2388

Fast communication chip

7.13 10-bit ADC

The LPC2388 contains one ADC. It is a single 10-bit successive approximation ADC with

eight channels.

7.13.1 Features

• 10-bit successive approximation ADC

• Input multiplexing among 8 pins

• Power-down mode

• Measurement range 0 V to V

i(VREF)

• 10-bit conversion time ≥ 2.44 μs

• Burst conversion mode for single or multiple inputs

• Optional conversion on transition of input pin or Timer Match signal

• Individual result registers for each ADC channel to reduce interrupt overhead

7.14 10-bit DAC

The DAC allows the LPC2388 to generate a variable analog output. The maximum output

value of the DAC is V

i(VREF)

7.14.1 Features

• 10-bit DAC

• Resistor string architecture

• Buffered output

• Power-down mode

• Selectable output drive

7.15 UARTs

The LPC2388 contains four UARTs. In addition to standard transmit and receive data

lines, UART1 also provides a full modem control handshake interface.

The UARTs include a fractional baud rate generator. Standard baud rates such as 115 200

can be achieved with any crystal frequency above 2

MHz.

7.15.1 Features

• 16 B Receive and Transmit FIFOs.

• Register locations conform to 16C550 industry standard.

• Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B.

• Built-in fractional baud rate generator covering wide range of baud rates without a

need for external crystals of particular values.

• Fractional divider for baud rate control, auto baud capabilities and FIFO control

mechanism that enables software flow control implementation.

• UART1 equipped with standard modem interface signals. This module also provides

full support for hardware flow control (auto-CTS/RTS).