Datasheet

Preliminary data sheet Rev. 00.01 — 23 October 2007 28 of 57

NXP Semiconductors

LPC2388

Fast communication chip

• Mono and stereo audio data supported.

• The sampling frequency can range from 16 kHz to 48 kHz ((16, 22.05, 32, 44.1,

48)

kHz).

• Configurable word select period in master mode (separately for I

S input and output).

• Two 8 word FIFO data buffers are provided, one for transmit and one for receive.

• Generates interrupt requests when buffer levels cross a programmable boundary.

• Two DMA requests, controlled by programmable buffer levels. These are connected

to the GPDMA block.

• Controls include reset, stop and mute options separately for I

S input and I

S output.

7.21 General purpose 32-bit timers/external event counters

The LPC2388 includes four 32-bit Timer/Counters. The Timer/Counter is designed to

count cycles of the system derived clock or an externally-supplied clock. It can optionally

generate interrupts or perform other actions at specified timer values, based on four

match registers. The Timer/Counter also includes four capture inputs to trap the timer

value when an input signal transitions, optionally generating an interrupt.

7.21.1 Features

• A 32-bit Timer/Counter with a programmable 32-bit prescaler.

• Counter or Timer operation.

• Up to four 32-bit capture channels per timer, that can take a snapshot of the timer

value when an input signal transitions. A capture event may also optionally generate

an interrupt.

• Four 32-bit match registers that allow:

– Continuous operation with optional interrupt generation on match.

– Stop timer on match with optional interrupt generation.

– Reset timer on match with optional interrupt generation.

• Up to four external outputs corresponding to match registers, with the following

capabilities:

– Set LOW on match.

– Set HIGH on match.

– Toggle on match.

– Do nothing on match.

7.22 Pulse width modulator

The PWM is based on the standard Timer block and inherits all of its features, although

only the PWM function is pinned out on the LPC2388. The Timer is designed to count

cycles of the system derived clock and optionally switch pins, generate interrupts or

perform other actions when specified timer values occur, based on seven match registers.

The PWM function is in addition to these features, and is based on match register events.