Datasheet

LPC2388_0 © NXP B.V. 2007. All rights reserved.
Preliminary data sheet Rev. 00.01 — 23 October 2007 5 of 57
NXP Semiconductors
LPC2388
Fast communication chip
6. Pinning information
6.1 Pinning
6.2 Pin description
Fig 2. LPC2388 pinning
LPC2388FBD144
108
37 72
144 109
73
1
36
002aad333
Table 3. Pin description
Symbol Pin Type Description
P0[0] to P0[31] I/O Port 0: Port 0 is a 32-bit I/O port with individual direction controls for each bit. The
operation of port 0 pins depends upon the pin function selected via the Pin Connect
block.
P0[0]/RD1/TXD/
SDA1
66
[1]
I/O P0[0] — General purpose digital input/output pin.
I RD1 — CAN1 receiver input.
O TXD3 — Transmitter output for UART3.
I/O SDA1 — I
2
C1 data input/output (this is not an open-drain pin).
P0[1]/TD1/RXD3/
SCL1
67
[1]
I/O P0[1] — General purpose digital input/output pin.
O TD1 — CAN1 transmitter output.
I RXD3 — Receiver input for UART3.
I/O SCL1 — I
2
C1 clock input/output (this is not an open-drain pin).
P0[2]/TXD0 141
[1]
I/O P0[2] — General purpose digital input/output pin.
O TXD0 — Transmitter output for UART0.
P0[3]/RXD0 142
[1]
I/O P0[3] — General purpose digital input/output pin.
I RXD0 — Receiver input for UART0.
P0[4]/
I2SRX_CLK/
RD2/CAP2[0]
116
[1]
I/O P0[4] — General purpose digital input/output pin.
I/O I2SRX_CLK — Receive Clock. It is driven by the master and received by the slave.
Corresponds to the signal SCK in the I
2
S-bus specification.
I RD2 — CAN2 receiver input.
I CAP2[0] — Capture input for Timer 2, channel 0.