Datasheet

LPC2420_60 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6.2 — 16 October 2013 35 of 87
NXP Semiconductors
LPC2420/2460
Flashless 16-bit/32-bit microcontroller
• Acceptance Filter can provide FullCAN-style automatic reception for selected
Standard Identifiers.
• FullCAN messages can generate interrupts.
7.12 10-bit ADC
The LPC2420/2460 contains one ADC. It is a single 10-bit successive approximation ADC
with eight channels.
7.12.1 Features
• 10-bit successive approximation ADC
• Input multiplexing among 8 pins
• Power-down mode
• Measurement range 0 V to V
i(VREF)
• 10-bit conversion time  2.44 s
• Burst conversion mode for single or multiple inputs
• Optional conversion on transition of input pin or Timer Match signal
• Individual result registers for each ADC channel to reduce interrupt overhead
7.13 10-bit DAC
The DAC allows the LPC2420/2460 to generate a variable analog output. The maximum
output value of the DAC is V
i(VREF)
.
7.13.1 Features
• 10-bit DAC
• Resistor string architecture
• Buffered output
• Power-down mode
• Selectable output drive
7.14 UARTs
The LPC2420/2460 contains four UARTs. In addition to standard transmit and receive
data lines, UART1 also provides a full modem control handshake interface.
The UARTs include a fractional baud rate generator. Standard baud rates such as
115200 Bd can be achieved with any crystal frequency above 2 MHz.
7.14.1 Features
• 16 B Receive and Transmit FIFOs.
• Register locations conform to 16C550 industry standard.
• Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B.
• Built-in fractional baud rate generator covering wide range of baud rates without a
need for external crystals of particular values.