Datasheet

LPC2420_60 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6.2 — 16 October 2013 83 of 87
NXP Semiconductors
LPC2420/2460
Flashless 16-bit/32-bit microcontroller
Modifications: Added LPC2420FET208.
Added Deep power-down mode information.
Table 6: Changed V
ESD
min/max to 2500/+2500.
Table 7: Updated conditions and typical values for I
DD(DCDC)act(3V3)
.
Table 7: Updated Table note 13.
Table 7: Updated min, typical and max values for oscillator pins.
Added Section 13.2 “XTAL1 input”.
Added Section 13.3 “XTAL and RTC Printed Circuit Board (PCB) layout guidelines”.
Figure 21: Changed ISP1301 to ISP1302.
Figure 22: Changed ISP1301 to ISP1302.
Section 7.25.3 “Brownout detection”: Changed V
DD(3V3)
to V
DD(DCDC)(3V3)
.
LPC2420_60 v.3 20081120 Preliminary data sheet - LPC2460 v.2
LPC2460 v.2 20080201 Preliminary data sheet - LPC2460 v.1
LPC2460 v.1 20080123 Preliminary data sheet - -
Table 23. Revision history
…continued
Document ID Release date Data sheet status Change notice Supersedes