Datasheet
LPC2468 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6.2 — 11 January 2013 22 of 85
NXP Semiconductors
LPC2468
Single-chip 16-bit/32-bit micro
P4[29]/BLS3/
MAT2[1]/RXD3
176
[1]
B10
[1]
I/O P4[29] — General purpose digital input/output pin.
O BLS3
— LOW active Byte Lane select signal 3.
O MAT2[1] — Match output for Timer 2, channel 1.
I RXD3 — Receiver input for UART3.
P4[30]/CS0
187
[1]
B7
[1]
I/O P4[30] — General purpose digital input/output pin.
O CS0
— LOW active Chip Select 0 signal.
P4[31]/CS1
193
[1]
A4
[1]
I/O P4[31] — General purpose digital input/output pin.
O CS1
— LOW active Chip Select 1 signal.
ALARM 37
[7]
N1
[7]
O ALARM — RTC controlled output. This is a 1.8 V pin. It goes HIGH when
a RTC alarm is generated.
USB_D252U1I/OUSB_D2 — USB port 2 bidirectional D line.
DBGEN 9
[1][8]
F4
[1][8]
I DBGEN — JTAG interface control signal. Also used for boundary
scanning.
TDO 2
[1][9]
D3
[1][9]
O TDO — Test Data Out for JTAG interface.
TDI 4
[1][8]
C2
[1][8]
I TDI — Test Data In for JTAG interface.
TMS 6
[1][8]
E3
[1][8]
I TMS — Test Mode Select for JTAG interface.
TRST
8
[1][8]
D1
[1][8]
I TRST — Test Reset for JTAG interface.
TCK 10
[1][9]
E2
[1][9]
I TCK — Test Clock for JTAG interface. This clock must be slower than
1
⁄
6
of the CPU clock (CCLK) for the JTAG interface to operate.
RTCK 206
[1][8]
C3
[1][8]
I/O RTCK — JTAG interface control signal.
Note: LOW on this pin while RESET
is LOW enables ETM pins (P2[9:0])
to operate as Trace port after reset.
RSTOUT
29
[1]
K3
[1]
O RSTOUT — This is a 3.3 V pin. LOW on this pin indicates LPC2468
being in Reset state.
RESET
35
[10]
M2
[10]
I external reset input: A LOW on this pin resets the device, causing I/O
ports and peripherals to take on their default states, and processor
execution to begin at address 0. TTL with hysteresis, 5 V tolerant.
XTAL1 44
[7][11]
M4
[7][11]
I Input to the oscillator circuit and internal clock generator circuits.
XTAL2 46
[7][11]
N4
[7][11]
O Output from the oscillator amplifier.
RTCX1 34
[7][12]
K2
[7][12]
I Input to the RTC oscillator circuit.
RTCX2 36
[7][12]
L2
[7][12]
O Output from the RTC oscillator circuit.
V
SSIO
33, 63,
77, 93,
114,
133,
148,
169,
189,
200
[13]
L3, T5,
R9, P12,
N16,
H14,
E15,
A12, B6,
A2
[13]
I ground: 0 V reference for the digital I/O pins.
V
SSCORE
32, 84,
172
[13]
K4, P10,
D12
[13]
I ground: 0 V reference for the core.
V
SSA
22
[14]
J2
[14]
I analog ground: 0 V reference. This should nominally be the same
voltage as V
SSIO
/V
SSCORE
, but should be isolated to minimize noise and
error.
Table 4. Pin description
…continued
Symbol Pin Ball Type Description