Datasheet

LPC2468 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6.2 — 11 January 2013 27 of 85
NXP Semiconductors
LPC2468
Single-chip 16-bit/32-bit micro
7.5 Interrupt controller
The ARM processor core has two interrupt inputs called Interrupt ReQuest (IRQ) and Fast
Interrupt ReQuest (FIQ). The VIC takes 32 interrupt request inputs which can be
programmed as FIQ or vectored IRQ types. The programmable assignment scheme
means that priorities of interrupts from the various peripherals can be dynamically
assigned and adjusted.
FIQs have the highest priority. If more than one request is assigned to FIQ, the VIC ORs
the requests to produce the FIQ signal to the ARM processor. The fastest possible FIQ
latency is achieved when only one request is classified as FIQ, because then the FIQ
Fig 4. LPC2468 memory map
0.0 GB
1.0 GB
ON-CHIP NON-VOLATILE MEMORY
0x0000 0000
0x0008 0000
RESERVED ADDRESS SPACE
SPECIAL REGISTERS
ON-CHIP STATIC RAM
RESERVED ADDRESS SPACE
0x4000 0000
0x3FFF 8000
0x0007 FFFF
0x3FFF FFFF
2.0 GB 0x8000 0000
0x7FFF FFFF
BOOT ROM AND BOOT FLASH
(BOOT FLASH REMAPPED FROM ON-CHIP FLASH)
0xDFFF FFFF
EXTERNAL STATIC AND DYNAMIC MEMORY
3.75 GB
4.0 GB
3.5 GB
AHB PERIPHERALS
APB PERIPHERALS
0xE000 0000
0xF000 0000
0xFFFF FFFF
002aac736