Datasheet

LPC2478 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3.1 — 16 October 2013 25 of 93
NXP Semiconductors
LPC2478
Single-chip 16-bit/32-bit microcontroller
P4[23]/A23/
RXD2/MOSI1
129
[1]
J15
[1]
I/O P4[23] — General purpose digital input/output pin.
I/O A23 — External memory address line 23.
I RXD2 — Receiver input for UART2.
I/O MOSI1 — Master Out Slave In for SSP1.
P4[24]/OE
183
[1]
B8
[1]
I/O P4[24] — General purpose digital input/output pin.
O OE
LOW active Output Enable signal.
P4[25]/WE
179
[1]
B9
[1]
I/O P4[25] — General purpose digital input/output pin.
O WE
LOW active Write Enable signal.
P4[26]/BLS0 119
[1]
L15
[1]
I/O P4[26] — General purpose digital input/output pin.
O BLS0 — LOW active Byte Lane select signal 0.
P4[27]/BLS1 139
[1]
G15
[1]
I/O P4[27] — General purpose digital input/output pin.
O BLS1 — LOW active Byte Lane select signal 1.
P4[28]/BLS2/
MAT2[0]/LCDVD[6]/
LCDVD[10]/
LCDVD[2]/
TXD3
170
[1]
C11
[1]
I/O P4 [28] — General purpose digital input/output pin.
O BLS2 — LOW active Byte Lane select signal 2.
O MAT2[0] — Match output for Timer 2, channel 0.
[21]
O LCDVD[6]/LCDVD[10]/LCDVD[2] — LCD data.
[21]
O TXD3 — Transmitter output for UART3.
P4[29]/BLS3/
MAT2[1]
LCDVD[7]/
LCDVD[11]/
LCDVD[3]/RXD3
176
[1]
B10
[1]
I/O P4[29] — General purpose digital input/output pin.
O BLS3 — LOW active Byte Lane select signal 3.
O MAT2[1] — Match output for Timer 2, channel 1.
[21]
O LCDVD[7]/LCDVD[11]/LCDVD[3] — LCD data.
[21]
I RXD3 — Receiver input for UART3.
P4[30]/CS0
187
[1]
B7
[1]
I/O P4[30] — General purpose digital input/output pin.
O CS0
LOW active Chip Select 0 signal.
P4[31]/CS1
193
[1]
A4
[1]
I/O P4[31] — General purpose digital input/output pin.
O CS1
LOW active Chip Select 1 signal.
ALARM 37
[8]
N1
[8]
O ALARM — RTC controlled output. This is a 1.8 V pin. It goes HIGH when
a RTC alarm is generated.
USB_D2 52 U1 I/O USB_D2 — USB port 2 bidirectional D line.
DBGEN 9
[1][22]
F4
[1][22]
I DBGEN — JTAG interface control signal. Also used for boundary
scanning.
TDO 2
[1][23]
D3
[1][23]
O TDO — Test Data Out for JTAG interface.
TDI 4
[1][22]
C2
[1][22]
I TDI — Test Data In for JTAG interface.
TMS 6
[1][22]
E3
[1][22]
I TMS — Test Mode Select for JTAG interface.
TRST
8
[1][22]
D1
[1][22]
I TRSTTest Reset for JTAG interface.
TCK 10
[1][23]
E2
[1][23]
I TCK — Test Clock for JTAG interface. This clock must be slower than
1
6
of the CPU clock (CCLK) for the JTAG interface to operate.
RTCK 206
[1][22]
C3
[1][22]
I/O RTCK — JTAG interface control signal.
Note: LOW on this pin while RESET
is LOW enables ETM pins (P2[9:0])
to operate as Trace port after reset.
RSTOUT
29 K3 O RSTOUTThis is a 3.3 V pin. LOW on this pin indicates LPC2478
being in Reset state.
Table 4. Pin description
…continued
Symbol Pin Ball Type Description