- NXP ARM Microcontroller Product Data Sheet
Table Of Contents
- 1. Introduction
- 2. General description
- 3. Features
- 4. Ordering information
- 5. Block diagram
- 6. Pinning information
- 7. Functional description
- 8. Block description
- 9. Limiting values
- 10. Thermal characteristics
- 11. Static characteristics
- 12. Dynamic characteristics
- 13. Package outline
- 14. Soldering
- 15. Abbreviations
- 16. References
- 17. Revision history
- 18. Legal information
- 19. Contact information
- 20. Contents
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LPC2917_19_1 © NXP B.V. 2007. All rights reserved.
Preliminary data sheet Rev. 1.01 — 15 November 2007 47 of 68
NXP Semiconductors
LPC2917/19
ARM9 microcontroller with CAN and LIN
8.8.5 Reset Generation Unit (RGU)
8.8.5.1 Overview
The key features of the Reset Generation Unit (RGU) are:
• Reset controlled individually per subsystem
• Automatic reset stretching and release
• Monitor function to trace resets back to source
• Register write-protection mechanism to prevent unintentional resets
8.8.5.2 Description
The RGU controls all internal resets.
Each reset output is defined as a (combination of) reset input sources including the
external reset input pins and internal power-on reset, see Table 25
. The first five resets
listed in this table form a sort of cascade to provide the multiple levels of impact that a
reset may have. The combined input sources are logically OR-ed together so that
activating any of the listed reset sources causes the output to go active.
Table 25. Reset output configuration
Reset Output Reset Source parts of the device reset when activated
POR_RST power-on reset module LP_OSC; is source for RGU_RST
RGU_RST POR_RST, RSTN pin RGU internal; is source for PCR_RST
PCR_RST RGU_RST, WATCHDOG PCR internal; is source for COLD_RST
COLD_RST PCR_RST parts with COLD_RST as reset source below
WARM_RST COLD_RST parts with WARM_RST as reset source below
SCU_RST COLD_RST SCU
CFID_RST COLD_RST CFID
FMC_RST COLD_RST embedded Flash-Memory Controller (FMC)
EMC_RST COLD_RST embedded SRAM-Memory Controller
SMC_RST COLD_RST external Static-Memory Controller (SMC)
GESS_A2V_RST WARM_RST GeSS AHB-to-VPB bridge
PESS_A2V_RST WARM_RST PeSS AHB-to-VPB bridge
GPIO_RST WARM_RST all GPIO modules
UART_RST WARM_RST all UART modules
TMR_RST WARM_RST all Timer modules in PeSS
SPI_RST WARM_RST all SPI modules
IVNSS_A2V_RST WARM_RST IVNSS AHB-to-VPB bridge
IVNSS_CAN_RST WARM_RST all CAN modules including Acceptance filter
IVNSS_LIN_RST WARM_RST all LIN modules
MSCSS_A2V_RST WARM_RST MSCSS AHB to VPB bridge
MSCSS_PWM_RST WARM_RST all PWM modules
MSCSS_ADC_RST WARM_RST all ADC modules
MSCSS_TMR_RST WARM_RST all Timer modules in MSCSS
VIC_RST WARM_RST Vectored Interrupt Controller (VIC)
AHB_RST WARM_RST CPU and AHB Multilayer Bus infrastructure