Datasheet
LPC3141_43 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 4 June 2012 10 of 69
NXP Semiconductors
LPC3141/3143
Low-cost, low-power ARM926EJ microcontrollers
I
2
S/digital audio output
mI2STX_DATA0
[4]
M13 SUP3 DO/GPIO O DIO1 I
2
S serial data transmit output.
mI2STX_BCK0
[4]
M12 SUP3 DO/GPIO O DIO1 I
2
S bit clock.
mI2STX_WS0
[4]
M11 SUP3 DO/GPIO O DIO1 I
2
S word select.
mI2STX_CLK0
[4]
N14 SUP3 DO/GPIO O DIO1 I
2
S serial clock.
I2STX_DATA1
[4]
F12 SUP3 DO/GPIO O DIO1 I
2
S serial data transmit output.
I2STX_BCK1
[4]
E14 SUP3 DO/GPIO O DIO1 I
2
S bit clock.
I2STX_WS1
[4]
G10 SUP3 DO/GPIO O DIO1 I
2
S word select.
General Purpose IO (GPIO)
GPIO0
[7]
K10 SUP3 GPIO I:PD DIO1 General Purpose IO pin 0 (mode pin 0).
GPIO1
[7]
J10 SUP3 GPIO I:PD DIO1 General Purpose IO pin 1 (mode pin 1).
GPIO2
[7]
L14 SUP3 GPIO I DIO1 General Purpose IO pin 2 (mode pin 2).
GPIO3 B11 SUP3 GPIO I DIO1 General Purpose IO pin 3.
GPIO4 C11 SUP3 GPI I DIO1 General Purpose input pin 4.
mGPIO5
[4]
B6 SUP3 GPIO I DIO4 General Purpose IO pin 5.
mGPIO6
[4]
A6 SUP3 GPIO I DIO4 General Purpose IO pin 6.
mGPIO7
[4]
A5 SUP3 GPIO I DIO4 General Purpose IO pin 7.
mGPIO8
[4]
B5 SUP3 GPIO I DIO4 General Purpose IO pin 8.
mGPIO9
[4]
C5 SUP3 GPIO I DIO4 General Purpose IO pin 9.
mGPIO10
[4]
A4 SUP3 GPIO I DIO4 General Purpose IO pin 10.
GPIO11 H13 SUP3 GPIO I DIO1 General Purpose IO pin 11.
GPIO12 H10 SUP3 GPIO I DIO1 General Purpose IO pin 12.
GPIO13 J12 SUP3 GPIO I DIO1 General Purpose IO pin 13.
GPIO14 J14 SUP3 GPIO I DIO1 General Purpose IO pin 14.
GPIO15 J13 SUP3 GPIO I DIO1 General Purpose IO pin 15.
GPIO16 J11 SUP3 GPIO I DIO1 General Purpose IO pin 16.
GPIO17 K12 SUP3 GPIO I DIO1 General Purpose IO pin 17.
GPIO18 K14 SUP3 GPIO I DIO1 General Purpose IO pin 18.
GPIO19 H11 SUP3 GPIO I DIO1 General Purpose IO pin 19.
GPIO20 K13 SUP3 GPIO I DIO1 General Purpose IO pin 20.
External Bus Interface (EBI)/NAND flash controller
EBI_A_0_ALE
[4]
B3 SUP4 DO O DIO4 EBI address latch enable.
EBI_A_1_CLE
[4]
A2 SUP4 DO O DIO4 EBI command latch enable.
EBI_D_0
[4]
G2 SUP4 DIO I DIO4 EBI data I/O 0.
EBI_D_1
[4]
F2 SUP4 DIO I DIO4 EBI data I/O 1.
EBI_D_2
[4]
F1 SUP4 DIO I DIO4 EBI data I/O 2.
EBI_D_3
[4]
E1 SUP4 DIO I DIO4 EBI data I/O 3.
EBI_D_4
[4]
E2 SUP4 DIO I DIO4 EBI data I/O 4.
Table 4. Pin description
…continued
Pin names with prefix m are multiplexed pins. See Table 10 for pin function selection of multiplexed pins.
Pin name BGA
Ball
Digital
I/O
level
[1]
Application
function
Pin
state
after
reset
[2]
Cell type
[3]
Description
