Datasheet

DR
AFT
DR
AFT
DRAFT
DR
D
RAFT
DRAFT
DRA
F
T DRAF
D
RAFT DRAFT DRAFT DRAFT DRAFT D
DRAFT
D
RAFT DRA
F
T DRAFT DRAFT DRAFT DRA
LPC3152_3154 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Preliminary data sheet Rev. 0.12 — 27 May 2010 12 of 88
NXP Semiconductors
LPC3152/3154
EBI_D_14
[4]
G2 SUP4 DIO I DIO4 EBI Data I/O 14
EBI_D_15
[4]
H2 SUP4 DIO I DIO4 EBI Data I/O 15
EBI_DQM_0_NOE
[4]
K3 SUP4 DO O DIO4 EBI read enable (active LOW)
EBI_NWE
[4]
K4 SUP4 DO O DIO4 EBI write enable (active LOW)
NAND_NCS_0
[4]
L2 SUP4 DO O DIO4 EBI chip enable 0
NAND_NCS_1
[4]
L3 SUP4 DO O DIO4 EBI chip enable 1
NAND_NCS_2
[4]
L4 SUP4 DO O DIO4 EBI chip enable 2
NAND_NCS_3
[4]
M2 SUP4 DO O DIO4 EBI chip enable 3
mNAND_RYBN0
[4]
B5 SUP4 DI I DIO4 EBI NAND ready/busy 0
mNAND_RYBN1
[4]
C5 SUP4 DI I DIO4 EBI NAND ready/busy 1
mNAND_RYBN2
[4]
D5 SUP4 DI I DIO4 EBI NAND ready/busy 2
mNAND_RYBN3
[4]
D4 SUP4 DI I DIO4 EBI NAND ready/busy 3
EBI_NCAS_BLOUT_0
[4]
J2 SUP4 DO O DIO4 EBI lower lane byte select (7:0)
EBI_NRAS_BLOUT_1
[4]
J4 SUP4 DO O DIO4 EBI upper lane byte select (15:8)
Secure one time programmable memory
VPP
[7]
C9 SUP1/
SUP3
Supply PS3 Supply for polyfuse programming
Real Time Clock (RTC)
RTC_VDD36 L15 SUP6 Supply CS1 RTC supply connected to battery
RTC_VSS M17 - Ground CG1 RTC ground
FSLOW_OUT L16 SUP7 AO AIO2 RTC 32.768 kHz clock output
FSLOW_IN L17 SUP7 AI AIO2 RTC 32.768 kHz clock input
RTC_INT M16 SUP6 DO O AIO2 RTC interrupt (HIGH active)
RTC_BACKUP K14 SUP7 Supply CS1 RTC backup capacitor connection
RTC_CLK32 U17 SUP6 AO O AIO2 RTC 32 kHz clock output for on-board
applications such as tuner
Power supply unit
PSU_VBUS J16 SUP5 Supply CS1 PSU USB supply voltage
PSU_VOUT1 H14 SUP3 AO CS1 PSU output1
PSU_LX1 H15 - AIO CS1 PSU external coil terminal for output1
PSU_LX2 G17 - AIO CS1 PSU external coil terminal for output2
PSU_VSS1 H16 - Ground CG1 PSU ground
PSU_VIN1 G16 - AI CS1 PSU output1 input voltage
PSU_VOUT2 G14 SUP1 AO CS1 PSU output2
PSU_VOUT3 E17 SUP2 AO CS1 PSU output3
PSU_VSSA D16 - Ground CG1 PSU ground
PSU_VSSA_CLEAN D17 - Ground CG1 PSU reference circuit ground
PSU_PLAY C17 SUP3 AI I AIO2 PSU play button input (active HIGH)
Table 4. Pin description
…continued
Pin names with prefix m are multiplexed pins. See Table 11 for pin function selection of multiplexed pins.
TFBGA pin name TFB
GA
ball
Digital
I/O
level
[1]
Application
function
Pin
state
after
reset
[2]
Cell type
[3]
Description