Datasheet

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LPC3152_3154 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Preliminary data sheet Rev. 0.12 — 27 May 2010 41 of 88
NXP Semiconductors
LPC3152/3154
The I
2
S0/1 module has the following features:
• Receive input supports master mode and slave mode.
• Transmit output supports master mode.
• Supports LSB justified words of 16, 18, 20 and 24 bits.
• Supports a configurable number of bit clock periods per word select period (up to 128
bit clock periods).
• Supports DMA transfers.
• Transmit FIFO or receive FIFO of 4 stereo samples.
• Supports single 16-bit transfers to/from the left or right FIFO.
• Supports single 24-bit transfers to/from the left or right FIFO.
• Supports 32-bit interleaved transfers, with the lower 16 bits representing the left audio
sample and the higher 16 bits representing the right audio sample.
• Supports two 16-bit samples audio samples combined in a 32-bit word (2 left or 2 right
samples) to reduce bus load.
• Provides maskable interrupts for audio status.
(FIFO underrun/overrun/full/half_full/not empty for left and right channel separately).
7. Functional description of the analog die blocks
7.1 Analog die
The analog die part of the LPC3152/3154 contains the audio codec, the Real-Time Clock
(RTC), the Power Supply Unit (PSU), the Li-ion charger, and the USB charge pump.