Datasheet

DR
AFT
DR
AFT
DRAFT
DR
D
RAFT
DRAFT
DRA
F
T DRAF
D
RAFT DRAFT DRAFT DRAFT DRAFT D
DRAFT
D
RAFT DRA
F
T DRAFT DRAFT DRAFT DRA
LPC3152_3154 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Preliminary data sheet Rev. 0.12 — 27 May 2010 57 of 88
NXP Semiconductors
LPC3152/3154
9.2.1.2 PSU_VOUT2 efficiency
Table 18. Efficiency of output on PSU_VOUT1 (PSU_VOUT1 programmed to 2.86 V)
I
BAT
/ mA V
BAT
/ V I
DD
/ mA V
DD
/ V Efficiency / %
on pin PSU_VBAT (SUP3) (SUP4)
2 3.602 1 2.8676 39.80566352
2.8 3.6016 2 2.864 56.80015231
3.598 - 3 2.8605 66.22816876
4.396 3.601 4 2.8569 72.18953182
5.195 3.6006 5 2.8533 76.27057345
5.994 3.6003 6 2.8498 79.23374865
6.793 3.5999 7 2.8462 81.47256753
7.59 3.5995 8 2.8426 83.23802841
8.388 3.5992 9 2.83991 84.63671469
9.231 3.5988 10 2.8542 85.9167695
13.32 3.597 15 2.8549 89.37941277
17.368 3.595 20 2.837 90.87420537
25.59 3.591 30 2.8198 92.056375145
SUP1 = 1.07 V.
SUP2: V
DD
= 1.398 V, I
DD
= 0 mA.
SUP3: V
DD
= 2.912 V, I
DD
= 0 mA.
PSU_VOUT2 = 1.07 V.
Fig 17. Efficiency PSU_VOUT2
I
DD
(mA)
0 302010
002aae467
60
40
80
100
η
(%)
20