Datasheet

DR
AFT
DR
AFT
DRAFT
DR
D
RAFT
DRAFT
DRA
F
T DRAF
D
RAFT DRAFT DRAFT DRAFT DRAFT D
DRAFT
D
RAFT DRA
F
T DRAFT DRAFT DRAFT DRA
LPC3152_3154 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Preliminary data sheet Rev. 0.12 — 27 May 2010 66 of 88
NXP Semiconductors
LPC3152/3154
[1] Parameters are valid over operating temperature range unless otherwise specified.
[2] All values valid for pads set to high slew rate. VDDE_IOA = VDDE_IOB = 1.8 ± 0.15 V. VDDI = 1.2 ± 0.1 V.
[3] Refer to the LPC3152/3154 user manual for the programming of MPMCDynamicReadConfig and SYSCREG_MPMP_DELAYMODES
registers.
[4] f
oper
= 1 / T
CLCL
[5] t
d(o)
, t
h(o)
, t
d(AV)
, t
h(A)
, t
d(QV)
, t
h(Q)
times are dependent on MPMCDynamicReadConfig register value and
SYSCREG_MPMP_DELAYMODES register bits 11:6.
[6] t
su(D)
, t
h(D)
times are dependent on SYSCREG_MPMP_DELAYMODES register bits 5:0.
t
h(o)
output hold time on pin EBI_CKE
[5]
0.13 - 3.6 ns
on pins
EBI_NRAS_BLOUT,
EBI_NCAS_BLOUT,
EBI_NWE,
EBI_NDYCS
−0.1 - 3.6 ns
on pins EBI_DQM_1,
EBI_DQM_0_NOE
1.7 - 5 ns
t
d(AV)
address valid delay
time
[5]
-- 5 ns
t
h(A)
address hold time
[5]
−0.1 - 5 ns
t
d(QV)
data output valid
delay time
[5]
-- 9 ns
t
h(Q)
data output hold time
[5]
4- 10 ns
t
su(D)
data input set-up
time
[6]
<tbd> - - ns
t
h(D)
data input hold time
[6]
<tbd> - - ns
t
QZ
data output
high-impedance time
-- <T
CLCL
ns
Table 25. Dynamic characteristics of SDR SDRAM memory interface
…continued
T
amb
= − 40 ° C to +85 ° C, unless otherwise specified.
[1][2][3]
Symbol Parameter Conditions Min Typical Max Unit