Datasheet

DR
AFT
DR
AFT
DRAFT
DR
D
RAFT
DRAFT
DRA
F
T DRAF
D
RAFT DRAFT DRAFT DRAFT DRAFT D
DRAFT
D
RAFT DRA
F
T DRAFT DRAFT DRAFT DRA
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LPC3152_3154 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Preliminary data sheet Rev. 0.12 — 27 May 2010 68 of 88 NXP Semiconductors
LPC3152/3154
Fig 24. SDRAM bank activate and write timing
EBI_CKE
WRITE
BANK,
ROW
BANK,
COLUMN
002aae123
EBI_A_[15:2]
EBI_D_[15:0]
EBI_CLKOUT
EBI_NRAS_BLOUT
EBI_NCAS_BLOUT
EBI_NWE
EBI_CKE
EBI_NDYCS
T
CLCL
t
CHCX
t
CLCX
t
h(o)
t
h(o)
t
d(o)
t
d(o)
t
d(AV)
t
d(QV)
t
h(A)
t
h(Q)
EBI_DQMx
t
QZ
ACTIVE
DATA