Datasheet
DR
AFT
DR
AFT
DRAFT
DR
D
RAFT
DRAFT
DRA
F
T DRAF
D
RAFT DRAFT DRAFT DRAFT DRAFT D
DRAFT
D
RAFT DRA
F
T DRAFT DRAFT DRAFT DRA
LPC3152_3154 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Preliminary data sheet Rev. 0.12 — 27 May 2010 7 of 88
NXP Semiconductors
LPC3152/3154
9 I2SRX_WS0 10 UART_RXD 11 mUART_RTS_N 12 mI2STX_WS0
13 GPIO0 14 ADC_VINR 15 ADC_MIC 16 ADC_VREFN
17 UOS_CX1 - - -
Row T
1 USB_DP 2 USB_GNDA 3 USB_VDDA33_DRV 4 mLCD_DB_12
5 mLCD_DB_7 6 mLCD_DB_2 7 mLCD_DB_0 8 mLCD_RW_WR
9 I2SRX_BCK0 10 TDI 11 mI2STX_CLK0 12 mI2STX_BCK0
13 mI2STX_DATA0 14 GPIO1 15 ADC_VINL 16 ADC_VREF
17 ADC_VREFP - - -
Row U
1 n.c. 2 mLCD_DB_14 3 mLCD_DB_13 4 mLCD_DB_11
5 mLCD_DB_8 6 mLCD_DB_4 7 VDDE_IOB 8 VSSE_IOB
9 TMS 10 JTAGSEL 11 TRST_N 12 TCK
13 VDDI 14 VSSI 15 VDDE_IOC 16 VSSE_IOC
17 RTC_CLK32 - - -
Table 3. Pin allocation table
…continued
Pin names with prefix m are multiplexed pins. See Table 11 for pin function selection of multiplexed pins.
Pin Symbol Pin Symbol Pin Symbol Pin Symbol
Table 4. Pin description
Pin names with prefix m are multiplexed pins. See Table 11 for pin function selection of multiplexed pins.
TFBGA pin name TFB
GA
ball
Digital
I/O
level
[1]
Application
function
Pin
state
after
reset
[2]
Cell type
[3]
Description
Clock generation unit
FFAST_IN A10 SUP1 AI AIO2 12 MHz oscillator clock input
FFAST_OUT B10 SUP1 AO AIO2 12 MHz oscillator clock output
VDDA12 B11 SUP1 Supply PS3 12 MHz oscillator/PLLs analog supply
VSSA12 C11 - Ground CG1 12 MHz oscillator/PLLs analog ground
RSTIN_N E15 SUP3 DI I:PU DIO2 System reset input (active LOW)
CLOCK_OUT M4 SUP4 DO O DIO4 Clock output
10-bit ADC
ADC10B_VDDA33 B13 SUP3 Supply PS3 10-bit ADC analog supply
ADC10B_GNDA A13 - Ground CG1 10-bit ADC analog ground
ADC10B_GPA0 B12 SUP3 AI AIO1 10-bit ADC analog input
ADC10B_GPA1 C13 SUP3 AI AIO1 10-bit ADC analog input
ADC10B_GPA2 C12 SUP3 AI AIO1 10-bit ADC analog input
Audio ADC
ADC_MIC R15 - AI AIO2 ADC microphone input
ADC_VINL T15 - AI AIO2 ADC line input left
ADC_VINR R14 - AI AIO2 ADC line input right
ADC_TINL P13 - AI AIO2 ADC tuner input left
ADC_TINR P14 - AI AIO2 ADC tuner input right
ADC_VREF T16 - AO AIO2 ADC reference voltage output