Datasheet

DR
AFT
DR
AFT
DRAFT
DR
D
RAFT
DRAFT
DRA
F
T DRAF
D
RAFT DRAFT DRAFT DRAFT DRAFT D
DRAFT
D
RAFT DRA
F
T DRAFT DRAFT DRAFT DRA
LPC3152_3154 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Preliminary data sheet Rev. 0.12 — 27 May 2010 70 of 88
NXP Semiconductors
LPC3152/3154
10.2.1 Crystal oscillator
10.2.2 SPI
Remark: Note that the signal names SCK, MISO, and MOSI correspond to signals on
pins SPI_SCK, SPI_MOSI, and SPI_MISO in the following SPI timing diagrams.
Table 27: Dynamic characteristics: crystal oscillator
Symbol Parameter Conditions Min Typ Max Unit
f
osc
oscillator frequency 10 12 25 MHz
δ
clk
clock duty cycle 45 50 55 %
C
xtal
crystal capacitance input; on pin
FFAST_IN
-- 2pF
output; on pin
FFAST_OUT
- - 0.74 pF
t
startup
start-up time - 500 - μs
P
drive
drive power 100 - 500 µW
Table 28. Dynamic characteristics of SPI pins
T
amb
= − 40 ° C to +85 ° C for industrial applications
Symbol Parameter Min Typ Max Unit
SPI master
T
SPICYC
SPI cycle time 22.2 - - ns
t
SPICLKH
SPICLK HIGH time 11.09 - 11.14 ns
t
SPICLKL
SPICLK LOW time 11.09 - 11.14 ns
t
SPIDSU
SPI data set-up time <tbd> <tbd> <tbd> ns
t
SPIDH
SPI data hold time <tbd> <tbd> <tbd> ns
t
SPIQV
SPI data output valid time - - 14 ns
t
SPIOH
SPI output data hold time 9.9 - - ns
SPI slave
T
SPICYC
SPI cycle time <tbd> 40 <tbd> ns
t
SPICLKH
SPICLK HIGH time <tbd> 20 <tbd> ns
t
SPICLKL
SPICLK LOW time <tbd> 20 <tbd> ns
t
SPIDSU
SPI data set-up time <tbd> <tbd> <tbd> ns
t
SPIDH
SPI data hold time <tbd> <tbd> <tbd> ns
t
SPIQV
SPI data output valid time <tbd> <tbd> 14 ns
t
SPIOH
SPI output data hold time 9.9 - - ns