Datasheet

DR
AFT
DR
AFT
DRAFT
DR
D
RAFT
DRAFT
DRA
F
T DRAF
D
RAFT DRAFT DRAFT DRAFT DRAFT D
DRAFT
D
RAFT DRA
F
T DRAFT DRAFT DRAFT DRA
LPC3152_3154 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Preliminary data sheet Rev. 0.12 — 27 May 2010 74 of 88
NXP Semiconductors
LPC3152/3154
10.2.3 I
2
S-interface
[1] x = 0 or 1.
Table 30. Dynamic characteristics: I
2
S-interface pins
T
amb
= − 40 ° C to +85 ° C for industrial applications
Symbol Parameter Conditions Min Typ Max Unit
common to input and output
T
cy(clk)
clock cycle time <tbd> <tbd> <tbd> ns
t
f
fall time 3.5 <tbd> <tbd> ns
t
r
rise time 3.5 <tbd> <tbd> ns
output
t
WH
pulse width HIGH <tbd> <tbd> <tbd> ns
t
WL
pulse width LOW <tbd> <tbd> <tbd> ns
t
v(Q)
data output valid time on pin I2STX_DATAx
[1]
<tbd> <tbd> <tbd> ns
on pin I2STX_WSx
[1]
<tbd> <tbd> <tbd> ns
input
t
su(D)
data input set-up time on pin I2SRX_DATAx
[1]
<tbd> <tbd> <tbd> ns
on pin I2SRX_WSx
[1]
<tbd> <tbd> <tbd> ns
t
h(D)
data input hold time on pin I2SRX_DATAx
[1]
<tbd> <tbd> <tbd> ns
on pin I2SRX_WSx
[1]
<tbd> <tbd> <tbd> ns
Fig 31. I
2
S-bus timing (output)
002aad992
I2STX_SCK
I2STX_SDA
I2STX_WS
T
cy
t
f
t
r
t
WH
t
WL
t
v(Q)
t
v(Q)