Datasheet

DR
AFT
DR
AFT
DRAFT
DR
D
RAFT
DRAFT
DRA
F
T DRAF
D
RAFT DRAFT DRAFT DRAFT DRAFT D
DRAFT
D
RAFT DRA
F
T DRAFT DRAFT DRAFT DRA
LPC3152_3154 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Preliminary data sheet Rev. 0.12 — 27 May 2010 76 of 88
NXP Semiconductors
LPC3152/3154
Remark: Signals SDA and SCL correspond to pins I2C_SDAx and I2C_SCLx (x = 0, 1).
Fig 33. I
2
C-bus pins clock timing
P
SS
P
002aad985
t
HD;STA
t
BUF
t
HD;STA
t
SU;STA
t
SU;DAT
t
f
t
HIGH
t
SU;STO
t
r
t
HD;STA
t
LOW
SDA
SCL