Datasheet

LPC3220_30_40_50 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2.1 — 24 June 2014 10 of 80
NXP Semiconductors
LPC3220/30/40/50
16/32-bit ARM microcontrollers
6.2 Pin description
Table 4. Pin description
Symbol Pin Power supply
domain
Type Description
ADIN0/TS_YM
U15 VDD_AD analog in ADC input 0/touch screen Y minus
ADIN1/TS_XM
T14 VDD_AD analog in ADC input 0/touch screen X minus
ADIN2/TS_AUX_IN
V16 VDD_AD analog in ADC input 2/touch screen AUX input
DBGEN
G14 VDD_IOD I: PD Device test input
LOW = JTAG in-circuit debug available; normal
operation.
HIGH = I/O cell boundary scan test; for board
assembly BSDL test.
EMC_A[0]/P1[0] L3 VDD_EMC I/O EMC address bit 0
I/O Port 1 GPIO bit 0
EMC_A[1]/P1[1]
L4 VDD_EMC I/O EMC address bit 1
I/O Port 1 GPIO bit 1
EMC_A[2]/P1[2]
M1 VDD_EMC I/O EMC address bit 2
I/O Port 1 GPIO bit 2
EMC_A[3]/P1[3]
M2 VDD_EMC I/O EMC address bit 3
I/O Port 1 GPIO bit 3
EMC_A[4]/P1[4]
M3 VDD_EMC I/O EMC address bit 4
I/O Port 1 GPIO bit 4
EMC_A[5]/P1[5] N1 VDD_EMC I/O EMC address bit 5
I/O Port 1 GPIO bit 5
EMC_A[6]/P1[6]
N2 VDD_EMC I/O EMC address bit 6
I/O Port 1 GPIO bit 6
EMC_A[7/P1[7]
N3 VDD_EMC I/O EMC address bit 7
I/O Port 1 GPIO bit 7
EMC_A[8]/P1[8]
M4 VDD_EMC I/O EMC address bit 8
I/O Port 1 GPIO bit 8
EMC_A[9]/P1[9]
P1 VDD_EMC I/O EMC address bit 9
I/O Port 1 GPIO bit 9
EMC_A[10]/P1[10]
P2 VDD_EMC I/O EMC address bit 10
I/O Port 1 GPIO bit 10
EMC_A[11]/P1[11]
P3 VDD_EMC I/O EMC address bit 11
I/O Port 1 GPIO bit 11
EMC_A[12]/P1[12]
N4 VDD_EMC I/O EMC address bit 12
I/O Port 1 GPIO bit 12
EMC_A[13]/P1[13]
R1 VDD_EMC I/O EMC address bit 13
I/O Port 1 GPIO bit 13
EMC_A[14]/P1[14]
R2 VDD_EMC I/O EMC address bit 14
I/O Port 1 GPIO bit 14