Datasheet

LPC3220_30_40_50 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2.1 — 24 June 2014 12 of 80
NXP Semiconductors
LPC3220/30/40/50
16/32-bit ARM microcontrollers
EMC_D[9] U6 VDD_EMC I/O: BK EMC data bit 9
EMC_D[10]
V6 VDD_EMC I/O: BK EMC data bit 10
EMC_D[11]
T7 VDD_EMC I/O: BK EMC data bit 11
EMC_D[12]
U7 VDD_EMC I/O: BK EMC data bit 12
EMC_D[13]
V7 VDD_EMC I/O: BK EMC data bit 13
EMC_D[14]
T8 VDD_EMC I/O: BK EMC data bit 14
EMC_D[15]
U8 VDD_EMC I/O: BK EMC data bit 15
EMC_D[16]/
EMC_DQS0
V8 VDD_EMC I/O: BK EMC data bit 16
I/O: BK DDR data strobe 0
EMC_D[17]/
EMC_DQS1
R9 VDD_EMC I/O: BK EMC data bit 17
I/O: BK DDR data strobe 1
EMC_D[18]/
EMC_CLK
V9 VDD_EMC I/O: P EMC data bit 18
I/O: P DDR inverted clock output
EMC_D[19]/P2[0] U9 VDD_EMC I/O: P EMC data bit 19
I/O: P Port 2 GPIO bit 0
EMC_D[20]/P2[1] T9 VDD_EMC I/O: P EMC data bit 20
I/O: P Port 2 GPIO bit 1
EMC_D[21]/P2[2] V10 VDD_EMC I/O: P EMC data bit 21
I/O: P Port 2 GPIO bit 2
EMC_D[22]/P2[3] U10 VDD_EMC I/O: P EMC data bit 22
I/O: P Port 2 GPIO bit 3
EMC_D[23]/P2[4] T10 VDD_EMC I/O: P EMC data bit 23
I/O: P Port 2 GPIO bit 4
EMC_D[24]/P2[5] R10 VDD_EMC I/O: P EMC data bit 24
I/O: P Port 2 GPIO bit 5
EMC_D[25]/P2[6] V11 VDD_EMC I/O: P EMC data bit 25
I/O: P Port 2 GPIO bit 6
EMC_D[26]/P2[7] U11 VDD_EMC I/O: P EMC data bit 26
I/O: P Port 2 GPIO bit 7
EMC_D[27]/P2[8] T11 VDD_EMC I/O: P EMC data bit 27
I/O: P Port 2 GPIO bit 8
EMC_D[28]/P2[9] V12 VDD_EMC I/O: P EMC data bit 28
I/O: P Port 2 GPIO bit 9
EMC_D[29]/P2[10] V13 VDD_EMC I/O: P EMC data bit 29
I/O: P Port 2 GPIO bit 10
EMC_D[30]/P2[11] U12 VDD_EMC I/O: P EMC data bit 30
I/O: P Port 2 GPIO bit 11
EMC_D[31]/P2[12] V14 VDD_EMC I/O: P EMC data bit 31
I/O: P Port 2 GPIO bit 12
EMC_DQM[0]
R3 VDD_EMC O SDRAM data mask 0 out
Table 4. Pin description …continued
Symbol Pin Power supply
domain
Type Description