Datasheet

LPC3220_30_40_50 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2.1 — 24 June 2014 57 of 80
NXP Semiconductors
LPC3220/30/40/50
16/32-bit ARM microcontrollers
11. Dynamic characteristics
11.1 Clocking and I/O port pins
[1] Parameters are valid over operating temperature range unless otherwise specified.
[2] After supply voltages are stable
[3] Supplied by an external crystal.
11.2 Static memory controller
Table 11. Dynamic characteristics
T
amb
=
40
C to +85
C, unless otherwise specified.
[1]
Symbol Parameter Conditions Min Typ Max Unit
Reset
t
w(RESET)ext
external RESET pulse width
[2]
10 - - ms
External clock
f
ext
external clock frequency
[3]
11320MHz
Port pins
t
r
rise time - 5 - ns
t
f
fall time - 5 - ns
Table 12. Dynamic characteristics: static external memory interface
C
L
=25pF, T
amb
=20
C, V
DD(EMC)
= 1.8 V, 2.5 V, or 3.3 V.
Symbol Parameter Notes Min Typ Max Unit
Common to read and write cycles
T
CLCL
clock cycle time
[1]
7.5 9.6 - ns
t
CSLAV
CS LOW to address valid time - 0 - ns
Read cycle parameters
t
OELAV
OE LOW to address valid time
[2]
-0 WAITOEN T
CLCL
-ns
t
BLSLAV
BLS LOW to address valid time
[2]
-0 WAITOEN T
CLCL
-ns
t
CSLOEL
CS LOW to OE LOW time - 0 + WAITOEN T
CLCL
-ns
t
CSLBLSL
CS LOW to BLS LOW time
[2]
- 0 + WAITOEN T
CLCL
-ns
t
OELOEH
OE LOW to OE HIGH time
[2][3]
-(WAITRD WAITOEN + 1) T
CLCL
-ns
t
BLSLBLSH
BLS LOW to BLS HIGH time
[2][3]
-(WAITRD WAITOEN + 1) T
CLCL
-ns
t
su(DQ)
data input/output set-up time
[6]
-8.4 - ns
t
h(DQ)
data input/output hold time
[6]
-0 - ns
t
CSHOEH
CS HIGH to OE HIGH time - 0 - ns
t
CSHBLSH
CS HIGH to BLS HIGH time - 0 - ns
t
OEHANV
OE HIGH to address invalid time - 1 T
CLCL
-ns
t
BLSHANV
BLS HIGH to address invalid time - 1 T
CLCL
-ns
Write cycle parameters
t
CSLDV
CS LOW to data valid time - 0 - ns
t
CSLWEL
CS LOW to WE LOW time
[4]
-(WAITWEN+1) T
CLCL
-ns
t
CSLBLSL
CS LOW to BLS LOW time
[4]
-(WAITWEN+ 1) T
CLCL
-ns
t
WELDV
WE LOW to data valid time
[4]
-0 (WAITWEN + 1) T
CLCL
-ns